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118 lines
10 KiB
Plaintext
118 lines
10 KiB
Plaintext
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-p870-d -iterations=1 -instruction-tables=full %p/../Inputs/zbb.s | FileCheck %s
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# CHECK: Resources:
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# CHECK-NEXT: [0] - SiFiveP800Branch:2 SiFiveP800IEXQ4, SiFiveP800IEXQ5
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# CHECK-NEXT: [1] - SiFiveP800Div:1
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# CHECK-NEXT: [2] - SiFiveP800FEXQ0:1
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# CHECK-NEXT: [3] - SiFiveP800FEXQ1:1
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# CHECK-NEXT: [4] - SiFiveP800FloatArith:2 SiFiveP800FEXQ0, SiFiveP800FEXQ1
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# CHECK-NEXT: [5] - SiFiveP800FloatDiv:1
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# CHECK-NEXT: [6] - SiFiveP800IEXQ0:1
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# CHECK-NEXT: [7] - SiFiveP800IEXQ1:1
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# CHECK-NEXT: [8] - SiFiveP800IEXQ2:1
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# CHECK-NEXT: [9] - SiFiveP800IEXQ3:1
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# CHECK-NEXT: [10] - SiFiveP800IEXQ4:1
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# CHECK-NEXT: [11] - SiFiveP800IEXQ5:1
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# CHECK-NEXT: [12] - SiFiveP800IntArith:4 SiFiveP800IEXQ0, SiFiveP800IEXQ1, SiFiveP800IEXQ2, SiFiveP800IEXQ3
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# CHECK-NEXT: [13] - SiFiveP800LD:1
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# CHECK-NEXT: [14] - SiFiveP800LDST:2
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# CHECK-NEXT: [15] - SiFiveP800Load:3 SiFiveP800LDST, SiFiveP800LDST, SiFiveP800LD
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# CHECK-NEXT: [16] - SiFiveP800Mul:2 SiFiveP800IEXQ1, SiFiveP800IEXQ3
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# CHECK-NEXT: [17] - SiFiveP800VDiv:1
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# CHECK-NEXT: [18] - SiFiveP800VEXQ0:1
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# CHECK-NEXT: [19] - SiFiveP800VEXQ1:1
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# CHECK-NEXT: [20] - SiFiveP800VFloatDiv:1
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# CHECK-NEXT: [21] - SiFiveP800VLD:1
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# CHECK-NEXT: [22] - SiFiveP800VST:1
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# CHECK-NEXT: [23] - SiFiveP800VectorArith:2 SiFiveP800VEXQ0, SiFiveP800VEXQ1
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# CHECK: Instruction Info:
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# CHECK-NEXT: [1]: #uOps
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# CHECK-NEXT: [2]: Latency
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# CHECK-NEXT: [3]: RThroughput
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# CHECK-NEXT: [4]: MayLoad
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# CHECK-NEXT: [5]: MayStore
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# CHECK-NEXT: [6]: HasSideEffects (U)
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# CHECK-NEXT: [7]: Bypass Latency
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# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
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# CHECK-NEXT: [9]: LLVM Opcode Name
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# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith ANDN andn a0, a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith ORN orn a0, a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith XNOR xnor a0, a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith CLZ clz a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith CLZW clzw a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith CTZ ctz a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith CTZW ctzw a0, a0
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# CHECK-NEXT: 1 2 0.50 2 SiFiveP800IntArith,SiFiveP800Mul CPOP cpop a0, a0
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# CHECK-NEXT: 1 2 0.50 2 SiFiveP800IntArith,SiFiveP800Mul CPOPW cpopw a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith MIN min a0, a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith MINU minu a0, a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith MAX max a0, a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith MAXU maxu a0, a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith C_SEXT_B sext.b a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith C_SEXT_H sext.h a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith C_ZEXT_H zext.h a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith ROL rol a0, a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith ROLW rolw a0, a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith ROR ror a0, a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith RORW rorw a0, a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith RORI rori a0, a0, 1
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith RORIW roriw a0, a0, 1
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith ORC_B orc.b a0, a0
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# CHECK-NEXT: 1 1 0.25 1 SiFiveP800IntArith REV8_RV64 rev8 a0, a0
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# CHECK: Resources:
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# CHECK-NEXT: [0] - SiFiveP800Div
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# CHECK-NEXT: [1] - SiFiveP800FEXQ0
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# CHECK-NEXT: [2] - SiFiveP800FEXQ1
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# CHECK-NEXT: [3] - SiFiveP800FloatDiv
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# CHECK-NEXT: [4] - SiFiveP800IEXQ0
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# CHECK-NEXT: [5] - SiFiveP800IEXQ1
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# CHECK-NEXT: [6] - SiFiveP800IEXQ2
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# CHECK-NEXT: [7] - SiFiveP800IEXQ3
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# CHECK-NEXT: [8] - SiFiveP800IEXQ4
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# CHECK-NEXT: [9] - SiFiveP800IEXQ5
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# CHECK-NEXT: [10] - SiFiveP800LD
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# CHECK-NEXT: [11.0] - SiFiveP800LDST
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# CHECK-NEXT: [11.1] - SiFiveP800LDST
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# CHECK-NEXT: [12] - SiFiveP800VDiv
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# CHECK-NEXT: [13] - SiFiveP800VEXQ0
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# CHECK-NEXT: [14] - SiFiveP800VEXQ1
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# CHECK-NEXT: [15] - SiFiveP800VFloatDiv
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# CHECK-NEXT: [16] - SiFiveP800VLD
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# CHECK-NEXT: [17] - SiFiveP800VST
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# CHECK: Resource pressure per iteration:
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11.0] [11.1] [12] [13] [14] [15] [16] [17]
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# CHECK-NEXT: - - - - 5.50 6.50 5.50 6.50 - - - - - - - - - - -
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# CHECK: Resource pressure by instruction:
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11.0] [11.1] [12] [13] [14] [15] [16] [17] Instructions:
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - andn a0, a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - orn a0, a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - xnor a0, a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - clz a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - clzw a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - ctz a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - ctzw a0, a0
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# CHECK-NEXT: - - - - - 0.50 - 0.50 - - - - - - - - - - - cpop a0, a0
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# CHECK-NEXT: - - - - - 0.50 - 0.50 - - - - - - - - - - - cpopw a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - min a0, a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - minu a0, a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - max a0, a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - maxu a0, a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - sext.b a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - sext.h a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - zext.h a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - rol a0, a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - rolw a0, a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - ror a0, a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - rorw a0, a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - rori a0, a0, 1
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - roriw a0, a0, 1
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - orc.b a0, a0
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# CHECK-NEXT: - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - rev8 a0, a0
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