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49 lines
2.3 KiB
Plaintext
49 lines
2.3 KiB
Plaintext
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full %p/../Inputs/zbc.s | FileCheck %s
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# CHECK: Resources:
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# CHECK-NEXT: [0] - SMX60_FP:1
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# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
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# CHECK-NEXT: [2] - SMX60_IEUA:1
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# CHECK-NEXT: [3] - SMX60_IEUB:1
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# CHECK-NEXT: [4] - SMX60_LS:2
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# CHECK-NEXT: [5] - SMX60_VFP:1
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# CHECK-NEXT: [6] - SMX60_VIEU:1
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# CHECK-NEXT: [7] - SMX60_VLS:1
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# CHECK: Instruction Info:
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# CHECK-NEXT: [1]: #uOps
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# CHECK-NEXT: [2]: Latency
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# CHECK-NEXT: [3]: RThroughput
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# CHECK-NEXT: [4]: MayLoad
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# CHECK-NEXT: [5]: MayStore
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# CHECK-NEXT: [6]: HasSideEffects (U)
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# CHECK-NEXT: [7]: Bypass Latency
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# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
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# CHECK-NEXT: [9]: LLVM Opcode Name
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# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
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# CHECK-NEXT: 1 2 0.50 2 SMX60_IEU CLMUL clmul a0, a0, a0
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# CHECK-NEXT: 1 2 0.50 2 SMX60_IEU CLMULR clmulr a0, a0, a0
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# CHECK-NEXT: 1 2 0.50 2 SMX60_IEU CLMULH clmulh a0, a0, a0
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# CHECK: Resources:
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# CHECK-NEXT: [0] - SMX60_FP
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# CHECK-NEXT: [1] - SMX60_IEUA
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# CHECK-NEXT: [2] - SMX60_IEUB
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# CHECK-NEXT: [3.0] - SMX60_LS
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# CHECK-NEXT: [3.1] - SMX60_LS
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# CHECK-NEXT: [4] - SMX60_VFP
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# CHECK-NEXT: [5] - SMX60_VIEU
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# CHECK-NEXT: [6] - SMX60_VLS
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# CHECK: Resource pressure per iteration:
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# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
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# CHECK-NEXT: - 1.50 1.50 - - - - -
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# CHECK: Resource pressure by instruction:
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# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
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# CHECK-NEXT: - 0.50 0.50 - - - - - clmul a0, a0, a0
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# CHECK-NEXT: - 0.50 0.50 - - - - - clmulr a0, a0, a0
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# CHECK-NEXT: - 0.50 0.50 - - - - - clmulh a0, a0, a0
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