derek.holloway
7502bf64a4
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324 lines
30 KiB
ArmAsm
324 lines
30 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=riscv64 -mcpu=tt-ascalon-x -instruction-tables=full -iterations=1 < %s | FileCheck %s
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vsetvli zero, zero, e8, mf8, ta, ma
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vlse8.v v8, (a0), t0
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vsetvli zero, zero, e8, mf4, ta, ma
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vlse8.v v8, (a0), t0
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vsetvli zero, zero, e8, mf2, ta, ma
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vlse8.v v8, (a0), t0
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vsetvli zero, zero, e8, m1, ta, ma
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vlse8.v v8, (a0), t0
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vsetvli zero, zero, e8, m2, ta, ma
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vlse8.v v8, (a0), t0
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vsetvli zero, zero, e8, m4, ta, ma
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vlse8.v v8, (a0), t0
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vsetvli zero, zero, e8, m8, ta, ma
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vlse8.v v8, (a0), t0
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vsetvli zero, zero, e16, mf4, ta, ma
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vlse16.v v8, (a0), t0
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vsetvli zero, zero, e16, mf2, ta, ma
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vlse16.v v8, (a0), t0
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vsetvli zero, zero, e16, m1, ta, ma
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vlse16.v v8, (a0), t0
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vsetvli zero, zero, e16, m2, ta, ma
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vlse16.v v8, (a0), t0
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vsetvli zero, zero, e16, m4, ta, ma
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vlse16.v v8, (a0), t0
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vsetvli zero, zero, e16, m8, ta, ma
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vlse16.v v8, (a0), t0
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vsetvli zero, zero, e32, mf2, ta, ma
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vlse32.v v8, (a0), t0
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vsetvli zero, zero, e32, m1, ta, ma
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vlse32.v v8, (a0), t0
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vsetvli zero, zero, e32, m2, ta, ma
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vlse32.v v8, (a0), t0
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vsetvli zero, zero, e32, m4, ta, ma
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vlse32.v v8, (a0), t0
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vsetvli zero, zero, e32, m8, ta, ma
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vlse32.v v8, (a0), t0
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vsetvli zero, zero, e64, m1, ta, ma
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vlse64.v v8, (a0), t0
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vsetvli zero, zero, e64, m2, ta, ma
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vlse64.v v8, (a0), t0
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vsetvli zero, zero, e64, m4, ta, ma
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vlse64.v v8, (a0), t0
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vsetvli zero, zero, e64, m8, ta, ma
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vlse64.v v8, (a0), t0
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vsetvli zero, zero, e8, mf8, ta, ma
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vsse8.v v8, (a0), t0
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vsetvli zero, zero, e8, mf4, ta, ma
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vsse8.v v8, (a0), t0
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vsetvli zero, zero, e8, mf2, ta, ma
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vsse8.v v8, (a0), t0
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vsetvli zero, zero, e8, m1, ta, ma
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vsse8.v v8, (a0), t0
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vsetvli zero, zero, e8, m2, ta, ma
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vsse8.v v8, (a0), t0
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vsetvli zero, zero, e8, m4, ta, ma
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vsse8.v v8, (a0), t0
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vsetvli zero, zero, e8, m8, ta, ma
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vsse8.v v8, (a0), t0
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vsetvli zero, zero, e16, mf4, ta, ma
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vsse16.v v8, (a0), t0
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vsetvli zero, zero, e16, mf2, ta, ma
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vsse16.v v8, (a0), t0
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vsetvli zero, zero, e16, m1, ta, ma
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vsse16.v v8, (a0), t0
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vsetvli zero, zero, e16, m2, ta, ma
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vsse16.v v8, (a0), t0
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vsetvli zero, zero, e16, m4, ta, ma
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vsse16.v v8, (a0), t0
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vsetvli zero, zero, e16, m8, ta, ma
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vsse16.v v8, (a0), t0
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vsetvli zero, zero, e32, mf2, ta, ma
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vsse32.v v8, (a0), t0
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vsetvli zero, zero, e32, m1, ta, ma
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vsse32.v v8, (a0), t0
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vsetvli zero, zero, e32, m2, ta, ma
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vsse32.v v8, (a0), t0
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vsetvli zero, zero, e32, m4, ta, ma
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vsse32.v v8, (a0), t0
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vsetvli zero, zero, e32, m8, ta, ma
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vsse32.v v8, (a0), t0
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vsetvli zero, zero, e64, m1, ta, ma
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vsse64.v v8, (a0), t0
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vsetvli zero, zero, e64, m2, ta, ma
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vsse64.v v8, (a0), t0
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vsetvli zero, zero, e64, m4, ta, ma
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vsse64.v v8, (a0), t0
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vsetvli zero, zero, e64, m8, ta, ma
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vsse64.v v8, (a0), t0
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# CHECK: Resources:
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# CHECK-NEXT: [0] - AscalonFP:2 AscalonFPA, AscalonFPB
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# CHECK-NEXT: [1] - AscalonFPA:1
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# CHECK-NEXT: [2] - AscalonFPB:1
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# CHECK-NEXT: [3] - AscalonFX:6 AscalonFXA, AscalonFXB, AscalonFXC, AscalonFXC, AscalonFXD, AscalonFXD
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# CHECK-NEXT: [4] - AscalonFXA:1
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# CHECK-NEXT: [5] - AscalonFXB:1
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# CHECK-NEXT: [6] - AscalonFXC:2
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# CHECK-NEXT: [7] - AscalonFXD:2
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# CHECK-NEXT: [8] - AscalonLS:3
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# CHECK-NEXT: [9] - AscalonV:2 AscalonVA, AscalonVB
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# CHECK-NEXT: [10] - AscalonVA:1
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# CHECK-NEXT: [11] - AscalonVB:1
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# CHECK: Instruction Info:
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# CHECK-NEXT: [1]: #uOps
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# CHECK-NEXT: [2]: Latency
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# CHECK-NEXT: [3]: RThroughput
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# CHECK-NEXT: [4]: MayLoad
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# CHECK-NEXT: [5]: MayStore
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# CHECK-NEXT: [6]: HasSideEffects (U)
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# CHECK-NEXT: [7]: Bypass Latency
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# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
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# CHECK-NEXT: [9]: LLVM Opcode Name
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# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VLSE8_V vlse8.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VLSE8_V vlse8.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VLSE8_V vlse8.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m1, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VLSE8_V vlse8.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m2, ta, ma
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# CHECK-NEXT: 1 4 0.33 * 4 AscalonLS VLSE8_V vlse8.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m4, ta, ma
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# CHECK-NEXT: 1 8 0.33 * 8 AscalonLS VLSE8_V vlse8.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m8, ta, ma
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# CHECK-NEXT: 1 16 0.33 * 16 AscalonLS VLSE8_V vlse8.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf4, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VLSE16_V vlse16.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf2, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VLSE16_V vlse16.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m1, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VLSE16_V vlse16.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m2, ta, ma
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# CHECK-NEXT: 1 4 0.33 * 4 AscalonLS VLSE16_V vlse16.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m4, ta, ma
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# CHECK-NEXT: 1 8 0.33 * 8 AscalonLS VLSE16_V vlse16.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m8, ta, ma
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# CHECK-NEXT: 1 16 0.33 * 16 AscalonLS VLSE16_V vlse16.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf2, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VLSE32_V vlse32.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m1, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VLSE32_V vlse32.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m2, ta, ma
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# CHECK-NEXT: 1 4 0.33 * 4 AscalonLS VLSE32_V vlse32.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m4, ta, ma
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# CHECK-NEXT: 1 8 0.33 * 8 AscalonLS VLSE32_V vlse32.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m8, ta, ma
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# CHECK-NEXT: 1 16 0.33 * 16 AscalonLS VLSE32_V vlse32.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m1, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VLSE64_V vlse64.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m2, ta, ma
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# CHECK-NEXT: 1 4 0.33 * 4 AscalonLS VLSE64_V vlse64.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m4, ta, ma
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# CHECK-NEXT: 1 8 0.33 * 8 AscalonLS VLSE64_V vlse64.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m8, ta, ma
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# CHECK-NEXT: 1 16 0.33 * 16 AscalonLS VLSE64_V vlse64.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VSSE8_V vsse8.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VSSE8_V vsse8.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VSSE8_V vsse8.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m1, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VSSE8_V vsse8.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m2, ta, ma
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# CHECK-NEXT: 1 4 0.33 * 4 AscalonLS VSSE8_V vsse8.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m4, ta, ma
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# CHECK-NEXT: 1 8 0.33 * 8 AscalonLS VSSE8_V vsse8.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m8, ta, ma
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# CHECK-NEXT: 1 16 0.33 * 16 AscalonLS VSSE8_V vsse8.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf4, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VSSE16_V vsse16.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf2, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VSSE16_V vsse16.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m1, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VSSE16_V vsse16.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m2, ta, ma
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# CHECK-NEXT: 1 4 0.33 * 4 AscalonLS VSSE16_V vsse16.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m4, ta, ma
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# CHECK-NEXT: 1 8 0.33 * 8 AscalonLS VSSE16_V vsse16.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m8, ta, ma
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# CHECK-NEXT: 1 16 0.33 * 16 AscalonLS VSSE16_V vsse16.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf2, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VSSE32_V vsse32.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m1, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VSSE32_V vsse32.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m2, ta, ma
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# CHECK-NEXT: 1 4 0.33 * 4 AscalonLS VSSE32_V vsse32.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m4, ta, ma
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# CHECK-NEXT: 1 8 0.33 * 8 AscalonLS VSSE32_V vsse32.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m8, ta, ma
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# CHECK-NEXT: 1 16 0.33 * 16 AscalonLS VSSE32_V vsse32.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m1, ta, ma
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# CHECK-NEXT: 1 2 0.33 * 2 AscalonLS VSSE64_V vsse64.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m2, ta, ma
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# CHECK-NEXT: 1 4 0.33 * 4 AscalonLS VSSE64_V vsse64.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m4, ta, ma
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# CHECK-NEXT: 1 8 0.33 * 8 AscalonLS VSSE64_V vsse64.v v8, (a0), t0
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m8, ta, ma
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# CHECK-NEXT: 1 16 0.33 * 16 AscalonLS VSSE64_V vsse64.v v8, (a0), t0
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# CHECK: Resources:
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# CHECK-NEXT: [0] - AscalonFPA
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# CHECK-NEXT: [1] - AscalonFPB
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# CHECK-NEXT: [2] - AscalonFXA
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# CHECK-NEXT: [3] - AscalonFXB
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# CHECK-NEXT: [4.0] - AscalonFXC
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# CHECK-NEXT: [4.1] - AscalonFXC
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# CHECK-NEXT: [5.0] - AscalonFXD
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# CHECK-NEXT: [5.1] - AscalonFXD
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# CHECK-NEXT: [6.0] - AscalonLS
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# CHECK-NEXT: [6.1] - AscalonLS
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# CHECK-NEXT: [6.2] - AscalonLS
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# CHECK-NEXT: [7] - AscalonVA
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# CHECK-NEXT: [8] - AscalonVB
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# CHECK: Resource pressure per iteration:
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# CHECK-NEXT: [0] [1] [2] [3] [4.0] [4.1] [5.0] [5.1] [6.0] [6.1] [6.2] [7] [8]
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# CHECK-NEXT: - - - - - - - - 14.67 14.67 14.67 22.00 22.00
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# CHECK: Resource pressure by instruction:
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# CHECK-NEXT: [0] [1] [2] [3] [4.0] [4.1] [5.0] [5.1] [6.0] [6.1] [6.2] [7] [8] Instructions:
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf8, ta, ma
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse8.v v8, (a0), t0
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf4, ta, ma
|
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse8.v v8, (a0), t0
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf2, ta, ma
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse8.v v8, (a0), t0
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m1, ta, ma
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse8.v v8, (a0), t0
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m2, ta, ma
|
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse8.v v8, (a0), t0
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m4, ta, ma
|
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse8.v v8, (a0), t0
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m8, ta, ma
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse8.v v8, (a0), t0
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, mf4, ta, ma
|
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse16.v v8, (a0), t0
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, mf2, ta, ma
|
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse16.v v8, (a0), t0
|
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m1, ta, ma
|
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse16.v v8, (a0), t0
|
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m2, ta, ma
|
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse16.v v8, (a0), t0
|
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m4, ta, ma
|
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse16.v v8, (a0), t0
|
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m8, ta, ma
|
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse16.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, mf2, ta, ma
|
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse32.v v8, (a0), t0
|
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m1, ta, ma
|
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse32.v v8, (a0), t0
|
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m2, ta, ma
|
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# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse32.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse32.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m8, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse32.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m1, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse64.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse64.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse64.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m8, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vlse64.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf8, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse8.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse8.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse8.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m1, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse8.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse8.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse8.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m8, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse8.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, mf4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse16.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, mf2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse16.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m1, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse16.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse16.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse16.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m8, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse16.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, mf2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse32.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m1, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse32.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse32.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse32.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m8, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse32.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m1, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse64.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse64.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse64.v v8, (a0), t0
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m8, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - 0.33 0.33 0.33 - - vsse64.v v8, (a0), t0
|