TheRock/compiler/amd-llvm/llvm/test/tools/llvm-reduce/mir/preserve-machine-function-info-amdgpu.mir

# REQUIRES: amdgpu-registered-target
# RUN: llvm-reduce -abort-on-invalid-reduction -simplify-mir -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2> %t.log
# RUN: FileCheck --check-prefix=RESULT %s < %t

# CHECK-INTERESTINGNESS-COUNT-6: S_NOP

# RESULT: name: func

--- |
  define void @func() {
    ret void
  }

...

# RESULT: machineFunctionInfo:
# RESULT-NEXT: explicitKernArgSize: 108
# RESULT-NEXT: maxKernArgAlign: 32
# RESULT-NEXT: ldsSize:         256
# RESULT-NEXT: gdsSize:         128
# RESULT-NEXT: dynLDSAlign:     16
# RESULT-NEXT: isEntryFunction: true
# RESULT-NEXT: memoryBound:     true
# RESULT-NEXT: waveLimiter:     true
# RESULT-NEXT: hasSpilledSGPRs: true
# RESULT-NEXT: hasSpilledVGPRs: true
# RESULT-NEXT: scratchRSrcReg:  '$sgpr48_sgpr49_sgpr50_sgpr51'
# RESULT-NEXT: frameOffsetReg:  '$sgpr44'
# RESULT-NEXT: stackPtrOffsetReg: '$sgpr45'
# RESULT-NEXT: bytesInStackArgArea: 112
# RESULT-NEXT: returnsVoid:     false
# RESULT-NEXT: argumentInfo:
# RESULT-NEXT: privateSegmentBuffer: { reg: '$sgpr60_sgpr61_sgpr62_sgpr63' }
# RESULT-NEXT: dispatchPtr:     { reg: '$sgpr6_sgpr7' }
# RESULT-NEXT: queuePtr:        { reg: '$sgpr4_sgpr5' }
# RESULT-NEXT: dispatchID:      { reg: '$sgpr12_sgpr13' }
# RESULT-NEXT: workGroupIDX:    { reg: '$sgpr20' }
# RESULT-NEXT: workGroupIDY:    { reg: '$sgpr19' }
# RESULT-NEXT: workGroupIDZ:    { reg: '$sgpr18' }
# RESULT-NEXT: LDSKernelId:     { reg: '$sgpr15' }
# RESULT-NEXT: implicitArgPtr:  { reg: '$sgpr10_sgpr11' }
# RESULT-NEXT: workItemIDX:     { reg: '$vgpr34', mask: 1023 }
# RESULT-NEXT: workItemIDY:     { reg: '$vgpr34', mask: 1047552 }
# RESULT-NEXT: workItemIDZ:     { reg: '$vgpr34', mask: 1072693248 }
# RESULT-NEXT: mode:
# RESULT-NEXT: ieee:            false
# RESULT-NEXT: dx10-clamp:      false
# RESULT-NEXT: fp32-input-denormals: false
# RESULT-NEXT: fp32-output-denormals: false
# RESULT-NEXT: fp64-fp16-input-denormals: false
# RESULT-NEXT: fp64-fp16-output-denormals: false
# RESULT-NEXT: highBitsOf32BitAddress: 4276993775
# RESULT-NEXT: occupancy:       8
# RESULT-NEXT: wwmReservedRegs:
# RESULT-NEXT: - '$vgpr2'
# RESULT-NEXT: - '$vgpr3'
# RESULT-NEXT: vgprForAGPRCopy: '$vgpr33'

# RESULT: S_NOP 0, implicit $sgpr48_sgpr49_sgpr50_sgpr51
# RESULT: S_NOP 0, implicit $vgpr33
# RESULT: S_NOP 0, implicit $sgpr44
# RESULT: S_NOP 0, implicit $sgpr45
# RESULT: S_NOP 0, implicit $vgpr2
# RESULT: S_NOP 0, implicit $vgpr3

---
name: func
tracksRegLiveness: true
machineFunctionInfo:
  explicitKernArgSize: 108
  maxKernArgAlign: 32
  ldsSize:         256
  gdsSize:         128
  dynLDSAlign:     16
  isEntryFunction: true
  memoryBound:     true
  waveLimiter:     true
  hasSpilledSGPRs: true
  hasSpilledVGPRs: true
  scratchRSrcReg:  '$sgpr48_sgpr49_sgpr50_sgpr51'
  frameOffsetReg:  '$sgpr44'
  stackPtrOffsetReg: '$sgpr45'
  bytesInStackArgArea: 112
  returnsVoid:     false
  argumentInfo:
    privateSegmentBuffer: { reg: '$sgpr60_sgpr61_sgpr62_sgpr63' }
    dispatchPtr:     { reg: '$sgpr6_sgpr7' }
    queuePtr:        { reg: '$sgpr4_sgpr5' }
    dispatchID:      { reg: '$sgpr12_sgpr13' }
    workGroupIDX:    { reg: '$sgpr20' }
    workGroupIDY:    { reg: '$sgpr19' }
    workGroupIDZ:    { reg: '$sgpr18' }
    implicitArgPtr:  { reg: '$sgpr10_sgpr11' }
    workItemIDX:     { reg: '$vgpr34', mask: 1023 }
    workItemIDY:     { reg: '$vgpr34', mask: 1047552 }
    workItemIDZ:     { reg: '$vgpr34', mask: 1072693248 }
  mode:
    ieee:            false
    dx10-clamp:      false
    fp32-input-denormals: false
    fp32-output-denormals: false
    fp64-fp16-input-denormals: false
    fp64-fp16-output-denormals: false
  highBitsOf32BitAddress: 0xfeedbeef
  occupancy:       8
  wwmReservedRegs:
    - '$vgpr2'
    - '$vgpr3'
  vgprForAGPRCopy: '$vgpr33'
body:             |
  bb.0:
    S_WAITCNT 0
    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec

    ; Test some register uses that are undef unless the reserved
    ; registers are respected.
    S_NOP 0, implicit $sgpr48_sgpr49_sgpr50_sgpr51
    S_NOP 0, implicit $vgpr33
    S_NOP 0, implicit $sgpr44
    S_NOP 0, implicit $sgpr45
    S_NOP 0, implicit $vgpr2
    S_NOP 0, implicit $vgpr3
    S_ENDPGM 0, implicit %0
...