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83 lines
4.4 KiB
MLIR
83 lines
4.4 KiB
MLIR
// RUN: not mlir-opt %s --split-input-file -convert-amdgpu-to-rocdl=chipset=gfx942 2>&1 | FileCheck %s --check-prefix=GFX942
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// RUN: mlir-opt %s --split-input-file -convert-amdgpu-to-rocdl=chipset=gfx950 | FileCheck %s --check-prefix=GFX950
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// GFX950-LABEL: func @fat_buffer_load_to_rocdl_f96
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// GFX950-SAME: (%[[ARG0:.*]]: memref<128x72xf32, #amdgpu.address_space<fat_raw_buffer>>)
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func.func @fat_buffer_load_to_rocdl_f96(%global : memref<128x72xf32, #amdgpu.address_space<fat_raw_buffer>>) {
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%c0 = arith.constant 0 : index
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%c12 = arith.constant 12 : index
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%c32 = arith.constant 32 : index
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%alloc = memref.alloc() : memref<64x64xf32, #gpu.address_space<workgroup>>
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// GFX950: %[[BUFFER_DESC:.*]] = builtin.unrealized_conversion_cast %[[ARG0]]
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// GFX950: %[[C0:.*]] = arith.constant 0 : index
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// GFX950: %[[IC0:.*]] = builtin.unrealized_conversion_cast %c0 : index to i64
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// GFX950: %[[C12:.*]] = arith.constant 12 : index
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// GFX950: %[[IC12:.*]] = builtin.unrealized_conversion_cast %[[C12]]
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// GFX950: %[[C32:.*]] = arith.constant 32 : index
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// GFX950: %[[IC32:.*]] = builtin.unrealized_conversion_cast %[[C32]]
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// GFX950: %[[ALLOC:.*]] = memref.alloc()
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// GFX950: %[[LDS_DESC:.*]] = builtin.unrealized_conversion_cast
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// GFX950: %[[GLOBAL_BASE:.*]] = llvm.extractvalue %[[BUFFER_DESC]][1]
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// GFX950: %[[C72:.*]] = llvm.mlir.constant(72 : index) : i64
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// GFX950: %[[MUL:.*]] = llvm.mul %[[IC12]], %[[C72]] : i64
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// GFX950: %[[SRC_OFFSET:.*]] = llvm.add %[[MUL]], %[[IC0]] : i64
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// GFX950: %[[GLOBAL_PTR:.*]] = llvm.getelementptr %[[GLOBAL_BASE]][%[[SRC_OFFSET]]]
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// GFX950: %[[LDS_BASE:.*]] = llvm.extractvalue %[[LDS_DESC]][1]
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// GFX950: %[[C64:.*]] = llvm.mlir.constant(64 : index) : i64
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// GFX950: %[[MUL_2:.*]] = llvm.mul %[[IC32]], %[[C64]] : i64
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// GFX950: %[[DST_OFFSET:.*]] = llvm.add %[[MUL_2]], %[[IC0]] : i64
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// GFX950: %[[LDS_PTR:.*]] = llvm.getelementptr %[[LDS_BASE]][%[[DST_OFFSET]]]
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// GFX950: rocdl.load.to.lds %[[GLOBAL_PTR]], %[[LDS_PTR]], 12
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// GFX942: error: 'amdgpu.gather_to_lds' op Gather to LDS instructions with 12-byte and 16-byte load widths are only supported on gfx950
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amdgpu.gather_to_lds %global[%c12, %c0], %alloc[%c32, %c0]
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: vector<16xf6E3M2FN>, memref<128x72xf32, #amdgpu.address_space<fat_raw_buffer>>, memref<64x64xf32, #gpu.address_space<workgroup>>
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func.return
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}
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// -----
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// GFX950-LABEL: func @fat_buffer_load_to_rocdl_f128
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// GFX950-SAME: (%[[ARG0:.*]]: memref<128x72xf32, #amdgpu.address_space<fat_raw_buffer>>)
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func.func @fat_buffer_load_to_rocdl_f128(%global : memref<128x72xf32, #amdgpu.address_space<fat_raw_buffer>>) {
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%c0 = arith.constant 0 : index
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%c12 = arith.constant 12 : index
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%c32 = arith.constant 32 : index
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%alloc = memref.alloc() : memref<64x64xf32, #gpu.address_space<workgroup>>
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// GFX950: %[[BUFFER_DESC:.*]] = builtin.unrealized_conversion_cast %[[ARG0]]
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// GFX950: %[[C0:.*]] = arith.constant 0 : index
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// GFX950: %[[IC0:.*]] = builtin.unrealized_conversion_cast %c0 : index to i64
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// GFX950: %[[C12:.*]] = arith.constant 12 : index
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// GFX950: %[[IC12:.*]] = builtin.unrealized_conversion_cast %[[C12]]
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// GFX950: %[[C32:.*]] = arith.constant 32 : index
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// GFX950: %[[IC32:.*]] = builtin.unrealized_conversion_cast %[[C32]]
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// GFX950: %[[ALLOC:.*]] = memref.alloc()
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// GFX950: %[[LDS_DESC:.*]] = builtin.unrealized_conversion_cast
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// GFX950: %[[GLOBAL_BASE:.*]] = llvm.extractvalue %[[BUFFER_DESC]][1]
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// GFX950: %[[C72:.*]] = llvm.mlir.constant(72 : index) : i64
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// GFX950: %[[MUL:.*]] = llvm.mul %[[IC12]], %[[C72]] : i64
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// GFX950: %[[SRC_OFFSET:.*]] = llvm.add %[[MUL]], %[[IC0]] : i64
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// GFX950: %[[GLOBAL_PTR:.*]] = llvm.getelementptr %[[GLOBAL_BASE]][%[[SRC_OFFSET]]]
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// GFX950: %[[LDS_BASE:.*]] = llvm.extractvalue %[[LDS_DESC]][1]
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// GFX950: %[[C64:.*]] = llvm.mlir.constant(64 : index) : i64
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// GFX950: %[[MUL_2:.*]] = llvm.mul %[[IC32]], %[[C64]] : i64
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// GFX950: %[[DST_OFFSET:.*]] = llvm.add %[[MUL_2]], %[[IC0]] : i64
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// GFX950: %[[LDS_PTR:.*]] = llvm.getelementptr %[[LDS_BASE]][%[[DST_OFFSET]]]
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// GFX950: rocdl.load.to.lds %[[GLOBAL_PTR]], %[[LDS_PTR]], 16
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// GFX942: error: 'amdgpu.gather_to_lds' op Gather to LDS instructions with 12-byte and 16-byte load widths are only supported on gfx950
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amdgpu.gather_to_lds %global[%c12, %c0], %alloc[%c32, %c0]
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: f128, memref<128x72xf32, #amdgpu.address_space<fat_raw_buffer>>, memref<64x64xf32, #gpu.address_space<workgroup>>
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func.return
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}
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