derek.holloway
7502bf64a4
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58 lines
3.0 KiB
MLIR
58 lines
3.0 KiB
MLIR
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
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// f32 divf — rounded, all 8 forms (4 rounding modes × 2 ftz states).
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llvm.func @divf_f32(%a : f32, %b : f32) -> f32 {
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// CHECK-LABEL: define float @divf_f32(float %0, float %1) {
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// CHECK: call float @llvm.nvvm.div.rn.f(float %{{.*}}, float %{{.*}})
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// CHECK: call float @llvm.nvvm.div.rz.f(float %{{.*}}, float %{{.*}})
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// CHECK: call float @llvm.nvvm.div.rm.f(float %{{.*}}, float %{{.*}})
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// CHECK: call float @llvm.nvvm.div.rp.f(float %{{.*}}, float %{{.*}})
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// CHECK: call float @llvm.nvvm.div.rn.ftz.f(float %{{.*}}, float %{{.*}})
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// CHECK: call float @llvm.nvvm.div.rz.ftz.f(float %{{.*}}, float %{{.*}})
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// CHECK: call float @llvm.nvvm.div.rm.ftz.f(float %{{.*}}, float %{{.*}})
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// CHECK: call float @llvm.nvvm.div.rp.ftz.f(float %{{.*}}, float %{{.*}})
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%r1 = nvvm.divf %a, %b {rnd = #nvvm.fp_rnd_mode<rn>} : f32
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%r2 = nvvm.divf %r1, %r1 {rnd = #nvvm.fp_rnd_mode<rz>} : f32
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%r3 = nvvm.divf %r2, %r2 {rnd = #nvvm.fp_rnd_mode<rm>} : f32
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%r4 = nvvm.divf %r3, %r3 {rnd = #nvvm.fp_rnd_mode<rp>} : f32
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%r5 = nvvm.divf %r4, %r4 {rnd = #nvvm.fp_rnd_mode<rn>, ftz = true} : f32
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%r6 = nvvm.divf %r5, %r5 {rnd = #nvvm.fp_rnd_mode<rz>, ftz = true} : f32
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%r7 = nvvm.divf %r6, %r6 {rnd = #nvvm.fp_rnd_mode<rm>, ftz = true} : f32
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%r8 = nvvm.divf %r7, %r7 {rnd = #nvvm.fp_rnd_mode<rp>, ftz = true} : f32
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llvm.return %r8 : f32
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}
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// f64 divf — rounded, all 4 forms (no ftz).
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llvm.func @divf_f64(%a : f64, %b : f64) -> f64 {
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// CHECK-LABEL: define double @divf_f64(double %0, double %1) {
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// CHECK: call double @llvm.nvvm.div.rn.d(double %{{.*}}, double %{{.*}})
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// CHECK: call double @llvm.nvvm.div.rz.d(double %{{.*}}, double %{{.*}})
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// CHECK: call double @llvm.nvvm.div.rm.d(double %{{.*}}, double %{{.*}})
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// CHECK: call double @llvm.nvvm.div.rp.d(double %{{.*}}, double %{{.*}})
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%r1 = nvvm.divf %a, %b {rnd = #nvvm.fp_rnd_mode<rn>} : f64
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%r2 = nvvm.divf %r1, %r1 {rnd = #nvvm.fp_rnd_mode<rz>} : f64
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%r3 = nvvm.divf %r2, %r2 {rnd = #nvvm.fp_rnd_mode<rm>} : f64
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%r4 = nvvm.divf %r3, %r3 {rnd = #nvvm.fp_rnd_mode<rp>} : f64
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llvm.return %r4 : f64
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}
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// divf.approx — 2 forms.
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llvm.func @divf_approx(%a : f32, %b : f32) -> f32 {
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// CHECK-LABEL: define float @divf_approx(float %0, float %1) {
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// CHECK: call float @llvm.nvvm.div.approx.f(float %{{.*}}, float %{{.*}})
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// CHECK: call float @llvm.nvvm.div.approx.ftz.f(float %{{.*}}, float %{{.*}})
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%r1 = nvvm.divf %a, %b {approx = true} : f32
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%r2 = nvvm.divf %r1, %r1 {approx = true, ftz = true} : f32
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llvm.return %r2 : f32
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}
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// divf.full — 2 forms.
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llvm.func @divf_full(%a : f32, %b : f32) -> f32 {
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// CHECK-LABEL: define float @divf_full(float %0, float %1) {
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// CHECK: call float @llvm.nvvm.div.full(float %{{.*}}, float %{{.*}})
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// CHECK: call float @llvm.nvvm.div.full.ftz(float %{{.*}}, float %{{.*}})
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%r1 = nvvm.divf %a, %b {full = true} : f32
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%r2 = nvvm.divf %r1, %r1 {full = true, ftz = true} : f32
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llvm.return %r2 : f32
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}
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