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45 lines
2.5 KiB
MLIR
45 lines
2.5 KiB
MLIR
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
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// A small condensed version of a problem requiring constant alloca raising in
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// Target Region Entries for user injected code, found in an issue in the Flang
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// compiler. Certain LLVM IR optimisation passes will perform runtime breaking
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// transformations on allocations not found to be in the entry block, current
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// OpenMP dialect lowering of TargetOp's will inject user allocations after
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// compiler generated entry code, in a separate block, this test checks that
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// a small function which attempts to raise some of these (specifically
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// constant sized) allocations performs its task reasonably in these
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// scenarios.
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module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memory_space", 5 : ui32>>, llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true} {
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llvm.func @_QQmain() attributes {omp.declare_target = #omp.declaretarget<device_type = (host), capture_clause = (to)>} {
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%1 = llvm.mlir.constant(1 : i64) : i64
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%2 = llvm.alloca %1 x !llvm.struct<(ptr)> : (i64) -> !llvm.ptr
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%3 = omp.map.info var_ptr(%2 : !llvm.ptr, !llvm.struct<(ptr)>) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr
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omp.target map_entries(%3 -> %arg0 : !llvm.ptr) {
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%4 = llvm.mlir.constant(1 : i32) : i32
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%5 = llvm.alloca %4 x !llvm.struct<(ptr)> {alignment = 8 : i64} : (i32) -> !llvm.ptr<5>
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%ascast1 = llvm.addrspacecast %5 : !llvm.ptr<5> to !llvm.ptr
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%6 = llvm.mlir.constant(50 : i32) : i32
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%7 = llvm.mlir.constant(1 : i64) : i64
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%8 = llvm.alloca %7 x i32 : (i64) -> !llvm.ptr<5>
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%ascast2 = llvm.addrspacecast %8 : !llvm.ptr<5> to !llvm.ptr
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llvm.store %6, %ascast2 : i32, !llvm.ptr
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%9 = llvm.mlir.undef : !llvm.struct<(ptr)>
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%10 = llvm.insertvalue %ascast2, %9[0] : !llvm.struct<(ptr)>
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llvm.store %10, %ascast1 : !llvm.struct<(ptr)>, !llvm.ptr
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%88 = llvm.call @_ExternalCall(%arg0, %ascast1) : (!llvm.ptr, !llvm.ptr) -> !llvm.struct<()>
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omp.terminator
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}
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llvm.return
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}
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llvm.func @_ExternalCall(!llvm.ptr, !llvm.ptr) -> !llvm.struct<()>
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}
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// CHECK: define weak_odr protected amdgpu_kernel void @{{.*}}QQmain_l{{.*}}({{.*}}, {{.*}}) #{{[0-9]+}} {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: %[[MOVED_ALLOCA1:.*]] = alloca { ptr }, align 8
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// CHECK-NEXT: %[[MOVED_ALLOCA2:.*]] = alloca i32, i64 1, align 4
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// CHECK: user_code.entry: ; preds = %entry
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// CHECK-NEXT: %[[MAP_ARG_ALLOC:.*]] = call align 8 ptr @__kmpc_alloc_shared(i64 8)
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