derek.holloway
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47 lines
1.8 KiB
MLIR
47 lines
1.8 KiB
MLIR
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
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module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-amd-amdhsa"]} {
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llvm.func @omp_target_region_() {
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%out_teams = llvm.mlir.constant(1000 : i32) : i32
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%out_threads = llvm.mlir.constant(2000 : i32) : i32
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%out_lb = llvm.mlir.constant(0 : i32) : i32
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%out_ub = llvm.mlir.constant(3000 : i32) : i32
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%out_step = llvm.mlir.constant(1 : i32) : i32
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omp.target
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host_eval(%out_teams -> %teams, %out_threads -> %threads,
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%out_lb -> %lb, %out_ub -> %ub, %out_step -> %step :
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i32, i32, i32, i32, i32) {
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omp.teams num_teams(to %teams : i32) thread_limit(%threads : i32) {
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omp.parallel {
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omp.distribute {
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omp.wsloop {
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omp.loop_nest (%iv) : i32 = (%lb) to (%ub) step (%step) {
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omp.yield
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}
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} {omp.composite}
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} {omp.composite}
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omp.terminator
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} {omp.composite}
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omp.terminator
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}
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omp.terminator
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}
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llvm.return
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}
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}
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// CHECK-LABEL: define void @omp_target_region_
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// CHECK: %[[ARGS:.*]] = alloca %struct.__tgt_kernel_arguments
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// CHECK: %[[TRIPCOUNT_ADDR:.*]] = getelementptr inbounds nuw %struct.__tgt_kernel_arguments, ptr %[[ARGS]], i32 0, i32 8
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// CHECK: store i64 3000, ptr %[[TRIPCOUNT_ADDR]]
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// CHECK: %[[TEAMS_ADDR:.*]] = getelementptr inbounds nuw %struct.__tgt_kernel_arguments, ptr %[[ARGS]], i32 0, i32 10
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// CHECK: store [3 x i32] [i32 1000, i32 0, i32 0], ptr %[[TEAMS_ADDR]]
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// CHECK: %[[THREADS_ADDR:.*]] = getelementptr inbounds nuw %struct.__tgt_kernel_arguments, ptr %[[ARGS]], i32 0, i32 11
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// CHECK: store [3 x i32] [i32 2000, i32 0, i32 0], ptr %[[THREADS_ADDR]]
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// CHECK: call i32 @__tgt_target_kernel(ptr @{{.*}}, i64 {{.*}}, i32 1000, i32 2000, ptr @{{.*}}, ptr %[[ARGS]])
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