derek.holloway
7502bf64a4
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80 lines
5.0 KiB
MLIR
80 lines
5.0 KiB
MLIR
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
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// The aim of this test is to verfiy that information of
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// alignment of loaded objects is passed to outlined
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// functions.
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module attributes {llvm.data_layout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9", llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_gpu = true, omp.is_target_device = true} {
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omp.private {type = private} @_QFEk_private_i32 : i32
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llvm.func @_QQmain() {
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%0 = llvm.mlir.constant(1 : i64) : i64
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%1 = llvm.alloca %0 x i32 {bindc_name = "k"} : (i64) -> !llvm.ptr<5>
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%2 = llvm.addrspacecast %1 : !llvm.ptr<5> to !llvm.ptr
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%3 = llvm.mlir.constant(1 : i64) : i64
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%4 = llvm.alloca %3 x i32 {bindc_name = "b"} : (i64) -> !llvm.ptr<5>
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%5 = llvm.addrspacecast %4 : !llvm.ptr<5> to !llvm.ptr
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%6 = llvm.mlir.addressof @_QFEa : !llvm.ptr
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%7 = llvm.mlir.addressof @_QFECnz : !llvm.ptr
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%8 = llvm.getelementptr %6[0, 0] : (!llvm.ptr) -> !llvm.ptr, !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)>
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%9 = omp.map.info var_ptr(%6 : !llvm.ptr, !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)>) map_clauses(tofrom) capture(ByRef) var_ptr_ptr(%8 : !llvm.ptr, i32) -> !llvm.ptr {name = ""}
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%10 = omp.map.info var_ptr(%6 : !llvm.ptr, !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)>) map_clauses(to) capture(ByRef) members(%9 : [0] : !llvm.ptr) -> !llvm.ptr {name = "a"}
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%11 = omp.map.info var_ptr(%5 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = "b"}
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%12 = omp.map.info var_ptr(%2 : !llvm.ptr, i32) map_clauses(implicit, exit_release_or_enter_alloc) capture(ByCopy) -> !llvm.ptr {name = "k"}
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%13 = omp.map.info var_ptr(%7 : !llvm.ptr, i32) map_clauses(implicit, exit_release_or_enter_alloc) capture(ByCopy) -> !llvm.ptr {name = "nz"}
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omp.target map_entries(%10 -> %arg0, %11 -> %arg1, %12 -> %arg2, %13 -> %arg3, %9 -> %arg4 : !llvm.ptr, !llvm.ptr, !llvm.ptr, !llvm.ptr, !llvm.ptr) {
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%14 = llvm.mlir.constant(0 : index) : i64
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%15 = llvm.mlir.constant(13 : i32) : i32
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%16 = llvm.mlir.constant(1000 : i32) : i32
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%17 = llvm.mlir.constant(1 : i32) : i32
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omp.teams {
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omp.parallel private(@_QFEk_private_i32 %arg2 -> %arg5 : !llvm.ptr) {
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%18 = llvm.mlir.constant(1 : i32) : i32
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%19 = llvm.alloca %18 x !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)> {alignment = 8 : i64} : (i32) -> !llvm.ptr<5>
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%20 = llvm.addrspacecast %19 : !llvm.ptr<5> to !llvm.ptr
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omp.distribute {
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omp.wsloop {
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omp.loop_nest (%arg6) : i32 = (%17) to (%16) inclusive step (%17) {
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llvm.store %arg6, %arg5 : i32, !llvm.ptr
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%115 = llvm.mlir.constant(48 : i32) : i32
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"llvm.intr.memcpy"(%20, %arg0, %115) <{isVolatile = false}> : (!llvm.ptr, !llvm.ptr, i32) -> ()
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omp.yield
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}
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} {omp.composite}
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} {omp.composite}
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omp.terminator
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} {omp.composite}
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omp.terminator
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}
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omp.terminator
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}
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llvm.return
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}
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llvm.mlir.global internal @_QFEa() {addr_space = 0 : i32} : !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)> {
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%6 = llvm.mlir.undef : !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)>
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llvm.return %6 : !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)>
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}
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llvm.mlir.global internal constant @_QFECnz() {addr_space = 0 : i32} : i32 {
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%0 = llvm.mlir.constant(1000 : i32) : i32
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llvm.return %0 : i32
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}
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}
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// CHECK: call void @__kmpc_distribute_for_static_loop_4u(
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// CHECK-SAME: ptr addrspacecast (ptr addrspace(1) @[[GLOB:[0-9]+]] to ptr),
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// CHECK-SAME: ptr @[[LOOP_BODY_FUNC:.*]], ptr %[[LOOP_BODY_FUNC_ARG:.*]],
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// CHEKC-SAME i32 1000, i32 %1, i32 0, i32 0)
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// CHECK: define internal void @[[LOOP_BODY_FUNC]](i32 %[[CNT:.*]], ptr %[[LOOP_BODY_ARG_PTR:.*]]) #[[ATTRS:[0-9]+]] {
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// CHECK: %[[GEP_PTR_0:.*]] = getelementptr { ptr, ptr, ptr }, ptr %[[LOOP_BODY_ARG_PTR]], i32 0, i32 0
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// CHECK: %[[INT_PTR:.*]] = load ptr, ptr %[[GEP_PTR_0]], align 8, !align ![[ALIGN_INT:[0-9]+]]
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// CHECK: %[[GEP_PTR_1:.*]] = getelementptr { ptr, ptr, ptr }, ptr %[[LOOP_BODY_ARG_PTR]], i32 0, i32 1
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// CHECK: %[[STRUCT_PTR_0:.*]] = load ptr, ptr %[[GEP_PTR_1]], align 8, !align ![[ALIGN_STRUCT:[0-9]+]]
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// CHECK: %[[GEP_PTR_2:.*]] = getelementptr { ptr, ptr, ptr }, ptr %[[LOOP_BODY_ARG_PTR]], i32 0, i32 2
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// CHECK: %[[STRUCT_PTR_1:.*]] = load ptr, ptr %[[GEP_PTR_2]], align 8, !align ![[ALIGN_STRUCT:[0-9]+]]
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// CHECK: store i32 %[[DATA_INT:.*]], ptr %[[INT_PTR]], align 4
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// CHECK: call void @llvm.memcpy.p0.p0.i32(ptr %[[STRUCT_PTR_0]], ptr %[[STRUCT_PTR_1]], i32 48, i1 false)
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// CHECK: ![[ALIGN_STRUCT]] = !{i64 8}
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// CHECK: ![[ALIGN_INT]] = !{i64 4}
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