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143 lines
6.7 KiB
MLIR
143 lines
6.7 KiB
MLIR
// RUN: mlir-translate -mlir-to-llvmir -split-input-file %s | FileCheck --check-prefixes=AMDGCN,NVPTX %s
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// Minimal MLIR to exercise array byref reduction descriptor handling in
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// target teams distribute parallel do.
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module attributes {dlti.dl_spec = #dlti.dl_spec<"dlti.alloca_memory_space" = 5 : ui64, "dlti.global_memory_space" = 1 : ui64>, llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_gpu = true, omp.is_target_device = true} {
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omp.declare_reduction @add_reduction_byref_box_4xi32 : !llvm.ptr attributes {byref_element_type = !llvm.array<4 x i32>} alloc {
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%0 = llvm.mlir.constant(1 : i64) : i64
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%1 = llvm.alloca %0 x !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)> : (i64) -> !llvm.ptr<5>
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%2 = llvm.addrspacecast %1 : !llvm.ptr<5> to !llvm.ptr
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omp.yield(%2 : !llvm.ptr)
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} init {
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^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
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omp.yield(%arg1 : !llvm.ptr)
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} combiner {
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^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
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omp.yield(%arg0 : !llvm.ptr)
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} data_ptr_ptr {
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^bb0(%arg0: !llvm.ptr):
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%0 = llvm.getelementptr %arg0[0, 0] : (!llvm.ptr) -> !llvm.ptr, !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)>
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omp.yield(%0 : !llvm.ptr)
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}
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llvm.func @test_array_reduction_() attributes {omp.declare_target = #omp.declaretarget<device_type = (host), capture_clause = (to)>} {
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%0 = llvm.mlir.constant(1 : i64) : i64
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%1 = llvm.alloca %0 x !llvm.array<4 x i32> : (i64) -> !llvm.ptr<5>
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%2 = llvm.addrspacecast %1 : !llvm.ptr<5> to !llvm.ptr
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%3 = omp.map.info var_ptr(%2 : !llvm.ptr, !llvm.array<4 x i32>) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = "red_array"}
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omp.target map_entries(%3 -> %arg0 : !llvm.ptr) {
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%4 = llvm.mlir.constant(1 : i32) : i32
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%5 = llvm.mlir.constant(1000 : i32) : i32
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omp.teams reduction(byref @add_reduction_byref_box_4xi32 %arg0 -> %arg1 : !llvm.ptr) {
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omp.parallel {
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omp.distribute {
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omp.wsloop {
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omp.loop_nest (%iv) : i32 = (%4) to (%5) inclusive step (%4) {
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omp.yield
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}
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} {omp.composite}
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} {omp.composite}
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omp.terminator
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} {omp.composite}
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omp.terminator
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}
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omp.terminator
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}
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llvm.return
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}
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}
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// Verify kernel environment has correct ReductionDataSize for by-ref array
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// reduction. The by-ref element type is [4 x i32] = 16 bytes, so the
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// struct should be {[4 x i32]} = 16 bytes. Failing to account for the by-ref
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// indirection would result in a struct of {ptr} = 8 bytes.
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// AMDGCN: @{{.*}}_kernel_environment = {{.*}} %struct.ConfigurationEnvironmentTy { {{.*}}i32 16, i32 1024 }
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// Verify the reduce_data_size argument to __kmpc_nvptx_teams_reduce_nowait_v2
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// matches the by-ref element type size (16), not the pointer size (8).
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// AMDGCN: call i32 @__kmpc_nvptx_teams_reduce_nowait_v2({{.*}}, i32 1024, i64 16,
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// Verify descriptor is copied via memcpy and base_ptr is updated in all helpers
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// AMDGCN-LABEL: define internal void @_omp_reduction_shuffle_and_reduce_func
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// AMDGCN: call void @llvm.memcpy{{.*}}(ptr {{.*}}, ptr {{.*}}, i64 {{[0-9]+}}, i1 false)
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// AMDGCN: getelementptr {{.*}} ptr {{%.*}}, i32 0, i32 0
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// AMDGCN: store ptr {{%.*}}, ptr
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// AMDGCN-LABEL: define internal void @_omp_reduction_list_to_global_reduce_func
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// AMDGCN: call void @llvm.memcpy{{.*}}(ptr {{.*}}, ptr {{.*}}, i64 {{[0-9]+}}, i1 false)
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// AMDGCN: getelementptr {{.*}} ptr {{%.*}}, i32 0, i32 0
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// AMDGCN: store ptr {{%.*}}, ptr
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// AMDGCN-LABEL: define internal void @_omp_reduction_global_to_list_copy_func
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// AMDGCN: call void @llvm.memcpy{{.*}}(ptr {{.*}}, ptr {{.*}}, i64 {{[0-9]+}}, i1 false)
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// AMDGCN: getelementptr {{.*}} ptr {{%.*}}, i32 0, i32 0
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// AMDGCN: store ptr {{%.*}}, ptr
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// -----
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module attributes {llvm.target_triple = "nvptx64-nvidia-cuda", omp.is_gpu = true, omp.is_target_device = true} {
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omp.declare_reduction @add_reduction_byref_box_4xi32 : !llvm.ptr attributes {byref_element_type = !llvm.array<4 x i32>} alloc {
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%0 = llvm.mlir.constant(1 : i64) : i64
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%1 = llvm.alloca %0 x !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)> : (i64) -> !llvm.ptr<5>
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%2 = llvm.addrspacecast %1 : !llvm.ptr<5> to !llvm.ptr
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omp.yield(%2 : !llvm.ptr)
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} init {
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^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
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omp.yield(%arg1 : !llvm.ptr)
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} combiner {
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^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
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omp.yield(%arg0 : !llvm.ptr)
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} data_ptr_ptr {
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^bb0(%arg0: !llvm.ptr):
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%0 = llvm.getelementptr %arg0[0, 0] : (!llvm.ptr) -> !llvm.ptr, !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)>
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omp.yield(%0 : !llvm.ptr)
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}
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llvm.func @test_array_reduction_() attributes {omp.declare_target = #omp.declaretarget<device_type = (host), capture_clause = (to)>} {
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%0 = llvm.mlir.constant(1 : i64) : i64
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%1 = llvm.alloca %0 x !llvm.array<4 x i32> : (i64) -> !llvm.ptr<5>
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%2 = llvm.addrspacecast %1 : !llvm.ptr<5> to !llvm.ptr
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%3 = omp.map.info var_ptr(%2 : !llvm.ptr, !llvm.array<4 x i32>) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = "red_array"}
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omp.target map_entries(%3 -> %arg0 : !llvm.ptr) {
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%4 = llvm.mlir.constant(1 : i32) : i32
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%5 = llvm.mlir.constant(1000 : i32) : i32
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omp.teams reduction(byref @add_reduction_byref_box_4xi32 %arg0 -> %arg1 : !llvm.ptr) {
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omp.parallel {
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omp.distribute {
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omp.wsloop {
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omp.loop_nest (%iv) : i32 = (%4) to (%5) inclusive step (%4) {
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omp.yield
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}
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} {omp.composite}
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} {omp.composite}
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omp.terminator
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} {omp.composite}
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omp.terminator
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}
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omp.terminator
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}
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llvm.return
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}
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}
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// NVPTX: @{{.*}}_kernel_environment = {{.*}} %struct.ConfigurationEnvironmentTy { {{.*}}i32 16, i32 1024 }
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// NVPTX: call i32 @__kmpc_nvptx_teams_reduce_nowait_v2({{.*}}, i32 1024, i64 16,
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// Verify descriptor is copied via memcpy and base_ptr is updated in all helpers
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// NVPTX-LABEL: define internal void @_omp_reduction_shuffle_and_reduce_func
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// NVPTX: call void @llvm.memcpy{{.*}}(ptr {{.*}}, ptr {{.*}}, i64 {{[0-9]+}}, i1 false)
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// NVPTX: getelementptr {{.*}} ptr {{%.*}}, i32 0, i32 0
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// NVPTX: store ptr {{%.*}}, ptr
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// NVPTX-LABEL: define internal void @_omp_reduction_list_to_global_reduce_func
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// NVPTX: call void @llvm.memcpy{{.*}}(ptr {{.*}}, ptr {{.*}}, i64 {{[0-9]+}}, i1 false)
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// NVPTX: getelementptr {{.*}} ptr {{%.*}}, i32 0, i32 0
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// NVPTX: store ptr {{%.*}}, ptr
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// NVPTX-LABEL: define internal void @_omp_reduction_global_to_list_copy_func
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// NVPTX: call void @llvm.memcpy{{.*}}(ptr {{.*}}, ptr {{.*}}, i64 {{[0-9]+}}, i1 false)
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// NVPTX: getelementptr {{.*}} ptr {{%.*}}, i32 0, i32 0
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// NVPTX: store ptr {{%.*}}, ptr
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