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77 lines
2.7 KiB
LLVM
77 lines
2.7 KiB
LLVM
; RUN: opt %loadNPMPolly '-passes=polly-custom<scops>' -polly-print-scops -disable-output < %s 2>&1 | FileCheck %s
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; RUN: opt %loadNPMPolly '-passes=polly-custom<scops>' -polly-print-scops -disable-output < %s 2>&1 | FileCheck %s
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; void f(long a[][128], long N, long M) {
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; long i, j;
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; for (j = 0; j < (4*N + 7*M +3); ++j)
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; for (i = (7*j + 6*M -9); i < (3*j + 5*N + 2) ; ++i)
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; a[i][j] = 0;
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; }
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
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define void @f(ptr nocapture %a, i64 %N, i64 %M) nounwind {
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entry:
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%0 = shl i64 %N, 2
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%1 = mul i64 %M, 7
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%2 = or i64 %0, 3
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%3 = add nsw i64 %2, %1
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%4 = icmp sgt i64 %3, 0
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br i1 %4, label %bb.nph8, label %return
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bb.nph8: ; preds = %entry
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%tmp14 = mul i64 %M, 6
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%tmp15 = add i64 %tmp14, -9
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%tmp20 = add i64 %1, %0
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%tmp21 = add i64 %tmp20, 3
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%tmp25 = mul i64 %M, -6
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%tmp26 = mul i64 %N, 5
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%tmp27 = add i64 %tmp25, %tmp26
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%tmp28 = add i64 %tmp27, 11
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%tmp35 = add i64 %tmp26, 2
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br label %bb
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bb: ; preds = %bb3, %bb.nph8
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%j.07 = phi i64 [ 0, %bb.nph8 ], [ %6, %bb3 ]
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%tmp17 = mul i64 %j.07, 897
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%tmp24 = mul i64 %j.07, -4
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%tmp13 = add i64 %tmp24, %tmp28
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%tmp30 = mul i64 %j.07, 7
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%tmp33 = add i64 %tmp30, %tmp15
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%tmp34 = mul i64 %j.07, 3
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%tmp36 = add i64 %tmp34, %tmp35
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%5 = icmp sgt i64 %tmp36, %tmp33
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br i1 %5, label %bb1, label %bb3
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bb1: ; preds = %bb1, %bb
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%indvar = phi i64 [ 0, %bb ], [ %indvar.next, %bb1 ]
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%tmp16 = add i64 %indvar, %tmp15
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%scevgep = getelementptr [128 x i64], ptr %a, i64 %tmp16, i64 %tmp17
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store i64 0, ptr %scevgep
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%indvar.next = add i64 %indvar, 1
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%exitcond = icmp eq i64 %indvar.next, %tmp13
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br i1 %exitcond, label %bb3, label %bb1
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bb3: ; preds = %bb1, %bb
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%6 = add nsw i64 %j.07, 1
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%exitcond22 = icmp eq i64 %6, %tmp21
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br i1 %exitcond22, label %return, label %bb
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return: ; preds = %bb3, %entry
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ret void
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}
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; CHECK: p0: %N
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; CHECK-NEXT: p1: %M
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;
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; CHECK: Statements {
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; CHECK-NEXT: Stmt_bb1
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [N, M] -> { Stmt_bb1[i0, i1] : 0 <= i0 <= 2 + 4N + 7M and 0 <= i1 <= 10 + 5N - 6M - 4i0 };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [N, M] -> { Stmt_bb1[i0, i1] -> [i0, i1] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [N, M] -> { Stmt_bb1[i0, i1] -> MemRef_a[-9 + 6M + i1, 897i0] };
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; CHECK-NEXT: }
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