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301 lines
11 KiB
C++
301 lines
11 KiB
C++
//===- SPIRVOpCode.h - Class to represent SPIR-V Operation Codes -*- C++ -*-==//
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//
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// The LLVM/SPIRV Translator
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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// Copyright (c) 2014 Advanced Micro Devices, Inc. All rights reserved.
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//
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// Permission is hereby granted, free of charge, to any person obtaining a
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// copy of this software and associated documentation files (the "Software"),
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// to deal with the Software without restriction, including without limitation
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// the rights to use, copy, modify, merge, publish, distribute, sublicense,
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// and/or sell copies of the Software, and to permit persons to whom the
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// Software is furnished to do so, subject to the following conditions:
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//
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// Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimers.
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// Redistributions in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimers in the documentation
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// and/or other materials provided with the distribution.
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// Neither the names of Advanced Micro Devices, Inc., nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// Software without specific prior written permission.
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH
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// THE SOFTWARE.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file defines Operation Code class for SPIR-V.
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///
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//===----------------------------------------------------------------------===//
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#ifndef SPIRV_LIBSPIRV_SPIRVOPCODE_H
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#define SPIRV_LIBSPIRV_SPIRVOPCODE_H
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#include "SPIRVUtil.h"
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#include "spirv/unified1/spirv.hpp"
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#include "spirv_internal.hpp"
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#include <string>
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using namespace spv;
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namespace SPIRV {
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template <> inline void SPIRVMap<Op, std::string>::init() {
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#define _SPIRV_OP(x, ...) add(Op##x, #x);
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#define _SPIRV_OP_INTERNAL(x, ...) add(internal::Op##x, #x);
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#include "SPIRVOpCodeEnum.h"
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#include "SPIRVOpCodeEnumInternal.h"
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#undef _SPIRV_OP_INTERNAL
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#undef _SPIRV_OP
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}
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SPIRV_DEF_NAMEMAP(Op, OpCodeNameMap)
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inline bool isFPAtomicOpCode(Op OpCode) {
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return OpCode == OpAtomicFAddEXT || OpCode == OpAtomicFMinEXT ||
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OpCode == OpAtomicFMaxEXT;
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}
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inline bool isAtomicOpCode(Op OpCode) {
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static_assert(OpAtomicLoad < OpAtomicXor, "");
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return ((unsigned)OpCode >= OpAtomicLoad &&
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(unsigned)OpCode <= OpAtomicXor) ||
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OpCode == OpAtomicFlagTestAndSet || OpCode == OpAtomicFlagClear ||
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isFPAtomicOpCode(OpCode);
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}
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inline bool isAtomicOpCodeUntypedPtrSupported(Op OpCode) {
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static_assert(OpAtomicLoad < OpAtomicXor, "");
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return ((unsigned)OpCode >= OpAtomicLoad &&
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(unsigned)OpCode <= OpAtomicXor) ||
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isFPAtomicOpCode(OpCode);
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}
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inline bool isBinaryOpCode(Op OpCode) {
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return ((unsigned)OpCode >= OpIAdd && (unsigned)OpCode <= OpFMod) ||
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OpCode == OpDot || OpCode == OpIAddCarry || OpCode == OpISubBorrow ||
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OpCode == OpUMulExtended || OpCode == OpSMulExtended;
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}
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inline bool isBinaryPtrOpCode(Op OpCode) {
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return (unsigned)OpCode >= OpPtrEqual && (unsigned)OpCode <= OpPtrDiff;
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}
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inline bool isShiftOpCode(Op OpCode) {
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return (unsigned)OpCode >= OpShiftRightLogical &&
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(unsigned)OpCode <= OpShiftLeftLogical;
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}
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inline bool isLogicalOpCode(Op OpCode) {
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return (unsigned)OpCode >= OpLogicalEqual && (unsigned)OpCode <= OpLogicalNot;
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}
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inline bool isUnaryPredicateOpCode(Op OpCode) {
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return (unsigned)OpCode >= OpAny && (unsigned)OpCode <= OpSignBitSet;
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}
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inline bool isBitwiseOpCode(Op OpCode) {
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return (unsigned)OpCode >= OpBitwiseOr && (unsigned)OpCode <= OpBitwiseAnd;
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}
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inline bool isBinaryShiftLogicalBitwiseOpCode(Op OpCode) {
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return (((unsigned)OpCode >= OpShiftRightLogical &&
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(unsigned)OpCode <= OpBitwiseAnd) ||
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isBinaryOpCode(OpCode));
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}
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inline bool isCmpOpCode(Op OpCode) {
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return ((unsigned)OpCode >= OpIEqual &&
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(unsigned)OpCode <= OpFUnordGreaterThanEqual) ||
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(OpCode >= OpLessOrGreater && OpCode <= OpLogicalNotEqual);
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}
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inline bool isCvtOpCode(Op OpCode) {
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return ((unsigned)OpCode >= OpConvertFToU && (unsigned)OpCode <= OpBitcast) ||
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OpCode == OpSatConvertSToU || OpCode == OpSatConvertUToS ||
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OpCode == OpPtrCastToCrossWorkgroupINTEL ||
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OpCode == OpCrossWorkgroupCastToPtrINTEL;
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}
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inline bool isIntelCvtOpCode(Op OpCode) {
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return OpCode == internal::OpClampConvertFToFINTEL ||
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OpCode == internal::OpClampConvertFToSINTEL ||
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OpCode == internal::OpStochasticRoundFToFINTEL ||
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OpCode == internal::OpClampStochasticRoundFToFINTEL ||
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OpCode == internal::OpClampStochasticRoundFToSINTEL;
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}
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inline bool isCvtToUnsignedOpCode(Op OpCode) {
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return OpCode == OpConvertFToU || OpCode == OpUConvert ||
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OpCode == OpSatConvertSToU;
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}
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inline bool isCvtFromUnsignedOpCode(Op OpCode) {
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return OpCode == OpConvertUToF || OpCode == OpUConvert ||
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OpCode == OpSatConvertUToS;
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}
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inline bool isSatCvtOpCode(Op OpCode) {
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return OpCode == OpSatConvertUToS || OpCode == OpSatConvertSToU;
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}
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inline bool isOpaqueGenericTypeOpCode(Op OpCode) {
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return ((unsigned)OpCode >= OpTypeEvent && (unsigned)OpCode <= OpTypeQueue) ||
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OpCode == OpTypeSampler;
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}
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inline bool isGenericNegateOpCode(Op OpCode) {
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return (unsigned)OpCode == OpSNegate || (unsigned)OpCode == OpFNegate ||
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(unsigned)OpCode == OpNot;
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}
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inline bool isAccessChainOpCode(Op OpCode) {
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return OpCode == OpAccessChain || OpCode == OpInBoundsAccessChain;
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}
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inline bool isUntypedAccessChainOpCode(Op OpCode) {
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return OpCode == OpUntypedAccessChainKHR ||
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OpCode == OpUntypedInBoundsAccessChainKHR ||
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OpCode == OpUntypedPtrAccessChainKHR ||
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OpCode == OpUntypedInBoundsPtrAccessChainKHR;
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}
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inline bool hasExecScope(Op OpCode) {
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unsigned OC = OpCode;
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return (OpGroupWaitEvents <= OC && OC <= OpGroupSMax) ||
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(OpGroupReserveReadPipePackets <= OC &&
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OC <= OpGroupCommitWritePipe) ||
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(OC == OpGroupNonUniformRotateKHR);
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}
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inline bool hasGroupOperation(Op OpCode) {
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unsigned OC = OpCode;
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return (OpGroupIAdd <= OC && OC <= OpGroupSMax) ||
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(OpGroupNonUniformBallotBitCount == OC) ||
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(OpGroupNonUniformIAdd <= OC && OC <= OpGroupNonUniformLogicalXor) ||
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(OpGroupIMulKHR <= OC && OC <= OpGroupLogicalXorKHR);
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}
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inline bool isUniformArithmeticOpCode(Op OpCode) {
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unsigned OC = OpCode;
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return (OpGroupIAdd <= OC && OC <= OpGroupSMax) ||
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(OpGroupIMulKHR <= OC && OC <= OpGroupLogicalXorKHR);
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}
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inline bool isNonUniformArithmeticOpCode(Op OpCode) {
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unsigned OC = OpCode;
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return (OpGroupNonUniformIAdd <= OC && OC <= OpGroupNonUniformLogicalXor);
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}
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inline bool isGroupLogicalOpCode(Op OpCode) {
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unsigned OC = OpCode;
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return OC == OpGroupNonUniformLogicalAnd ||
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OC == OpGroupNonUniformLogicalOr ||
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OC == OpGroupNonUniformLogicalXor || OC == OpGroupLogicalAndKHR ||
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OC == OpGroupLogicalOrKHR || OC == OpGroupLogicalXorKHR;
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}
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inline bool isGroupOpCode(Op OpCode) {
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unsigned OC = OpCode;
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return (OpGroupAll <= OC && OC <= OpGroupSMax) ||
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(OpGroupIMulKHR <= OC && OC <= OpGroupLogicalXorKHR);
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}
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inline bool isGroupNonUniformOpcode(Op OpCode) {
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unsigned OC = OpCode;
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return (OpGroupNonUniformElect <= OC && OC <= OpGroupNonUniformQuadSwap) ||
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(OC == OpGroupNonUniformRotateKHR);
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}
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inline bool isMediaBlockINTELOpcode(Op OpCode) {
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return OpCode == OpSubgroupImageMediaBlockReadINTEL ||
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OpCode == OpSubgroupImageMediaBlockWriteINTEL;
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}
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inline bool isPipeOpCode(Op OpCode) {
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unsigned OC = OpCode;
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return (OpReadPipe <= OC && OC <= OpGroupCommitWritePipe) ||
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(OpReadPipeBlockingINTEL <= OC && OC <= OpWritePipeBlockingINTEL);
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}
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inline bool isSubgroupAvcINTELTypeOpCode(Op OpCode) {
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unsigned OC = OpCode;
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return OpTypeAvcImePayloadINTEL <= OC && OC <= OpTypeAvcSicResultINTEL;
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}
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inline bool isSubgroupAvcINTELInstructionOpCode(Op OpCode) {
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unsigned OC = OpCode;
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return OpSubgroupAvcMceGetDefaultInterBaseMultiReferencePenaltyINTEL <= OC &&
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OC <= OpSubgroupAvcSicGetInterRawSadsINTEL;
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}
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inline bool isSubgroupAvcINTELEvaluateOpcode(Op OpCode) {
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unsigned OC = OpCode;
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return (OpSubgroupAvcImeEvaluateWithSingleReferenceINTEL <= OC &&
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OC <= OpSubgroupAvcImeEvaluateWithDualReferenceStreaminoutINTEL) ||
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(OpSubgroupAvcRefEvaluateWithSingleReferenceINTEL <= OC &&
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OC <= OpSubgroupAvcRefEvaluateWithMultiReferenceInterlacedINTEL) ||
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(OpSubgroupAvcSicEvaluateIpeINTEL <= OC &&
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OC <= OpSubgroupAvcSicEvaluateWithMultiReferenceInterlacedINTEL);
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}
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inline bool isVCOpCode(Op OpCode) { return OpCode == OpTypeBufferSurfaceINTEL; }
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inline bool isTypeOpCode(Op OpCode) {
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unsigned OC = OpCode;
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return (OpTypeVoid <= OC && OC <= OpTypePipe) || OC == OpTypePipeStorage ||
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isSubgroupAvcINTELTypeOpCode(OpCode) || OC == OpTypeVmeImageINTEL ||
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isVCOpCode(OpCode) || OC == internal::OpTypeTokenINTEL ||
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OC == OpTypeCooperativeMatrixKHR ||
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OC == internal::OpTypeTaskSequenceINTEL ||
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OC == OpTypeUntypedPointerKHR;
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}
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inline bool isFnVarSpecConstINTEL(Op OpCode) {
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unsigned OC = OpCode;
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return OC == OpSpecConstantArchitectureINTEL ||
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OC == OpSpecConstantTargetINTEL ||
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OC == OpSpecConstantCapabilitiesINTEL;
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}
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inline bool isSpecConstantOpCode(Op OpCode) {
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unsigned OC = OpCode;
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return (OpSpecConstantTrue <= OC && OC <= OpSpecConstantOp) ||
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isFnVarSpecConstINTEL(OpCode);
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}
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inline bool isConstantOpCode(Op OpCode) {
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unsigned OC = OpCode;
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return (OpConstantTrue <= OC && OC <= OpSpecConstantOp) || OC == OpUndef ||
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OC == OpPoisonKHR || OC == OpConstantPipeStorage ||
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OC == OpConstantFunctionPointerINTEL || isSpecConstantOpCode(OpCode);
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}
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inline bool isModuleScopeAllowedOpCode(Op OpCode) {
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return OpCode == OpVariable || OpCode == OpExtInst ||
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isConstantOpCode(OpCode);
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}
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inline bool isIntelSubgroupOpCode(Op OpCode) {
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unsigned OC = OpCode;
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return OpSubgroupShuffleINTEL <= OC && OC <= OpSubgroupImageBlockWriteINTEL;
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}
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inline bool isEventOpCode(Op OpCode) {
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return OpRetainEvent <= OpCode && OpCode <= OpCaptureEventProfilingInfo;
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}
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inline bool isSplitBarrierINTELOpCode(Op OpCode) {
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return OpCode == OpControlBarrierArriveINTEL ||
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OpCode == OpControlBarrierWaitINTEL;
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}
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} // namespace SPIRV
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#endif // SPIRV_LIBSPIRV_SPIRVOPCODE_H
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