derek.holloway
7502bf64a4
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311 lines
10 KiB
Plaintext
311 lines
10 KiB
Plaintext
# Copyright (C) 2022-2024 Free Software Foundation, Inc.
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# Copyright (C) 2022-2024 Advanced Micro Devices, Inc. All rights reserved.
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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# Test if all LLVM DWARF extensions for heterogenous debugging
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# (https://llvm.org/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.html) show
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# up in "info address" command.
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#
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# We also need to make sure that the existing "nice" printout is
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# backward compatible.
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load_lib dwarf.exp
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# This test can only be run on targets which support DWARF-2 and use gas.
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if {![dwarf2_support]} {
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return 0
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}
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# Choose suitable integer registers for the test.
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set dwarf_regnum 0
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if { [is_aarch64_target] } {
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set regname x0
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} elseif { [is_aarch32_target]
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|| [istarget "s390*-*-*" ]
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|| [istarget "powerpc*-*-*"]
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|| [istarget "rs6000*-*-aix*"] } {
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set regname r0
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} elseif { [is_x86_like_target] } {
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set regname eax
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} elseif { [is_amd64_regs_target] } {
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set regname rax
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} else {
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verbose "Skipping ${gdb_test_file_name}."
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return
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}
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standard_testfile var-access.c ${gdb_test_file_name}-dw.S
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# Make some DWARF for the test.
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set asm_file [standard_output_file $srcfile2]
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Dwarf::assemble $asm_file {
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global dwarf_regnum regname srcdir subdir srcfile
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set main_result [function_range main ${srcdir}/${subdir}/${srcfile}]
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set main_start [lindex $main_result 0]
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set main_length [lindex $main_result 1]
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set buf_var [gdb_target_symbol buf]
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cu {} {
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DW_TAG_compile_unit {
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{DW_AT_name var-access.c}
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{DW_AT_comp_dir /tmp}
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} {
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declare_labels int_type_label char_type_label
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# Define int type.
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int_type_label: DW_TAG_base_type {
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{DW_AT_name "int"}
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{DW_AT_encoding @DW_ATE_signed}
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{DW_AT_byte_size 4 DW_FORM_sdata}
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}
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# Define char type.
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char_type_label: DW_TAG_base_type {
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{DW_AT_name "char"}
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{DW_AT_encoding @DW_ATE_signed}
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{DW_AT_byte_size 1 DW_FORM_sdata}
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}
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DW_TAG_subprogram {
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{DW_AT_name main}
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{DW_AT_low_pc $main_start addr}
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{DW_AT_high_pc $main_length data8}
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} {
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# Define variable 'a' with all extensions from
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# DW_OP_LLVM_ namespace.
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DW_TAG_variable {
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{DW_AT_name a}
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{DW_AT_type :$int_type_label}
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{DW_AT_location {
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# This is not a meaningful expression. It's a
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# list of all the opcodes we want to be sure we
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# can dump with 'info address'.
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DW_OP_LLVM_push_lane
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DW_OP_lit0
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DW_OP_lit1
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DW_OP_LLVM_form_aspace_address
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DW_OP_LLVM_offset_constu 8
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DW_OP_LLVM_offset
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DW_OP_LLVM_bit_offset
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DW_OP_LLVM_undefined
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DW_OP_LLVM_extend 64 64
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DW_OP_LLVM_select_bit_piece 64 64
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DW_OP_LLVM_piece_end
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DW_OP_LLVM_call_frame_entry_reg $dwarf_regnum
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DW_OP_LLVM_aspace_bregx $dwarf_regnum 0
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} SPECIAL_expr}
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}
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# Define a variable 'b', which location can be printed
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# in a nicer way, as the expression does not contain the
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# LLVM DWARF extensions.
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DW_TAG_variable {
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{DW_AT_name b}
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{DW_AT_type :$int_type_label}
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{DW_AT_location {
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DW_OP_reg0
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DW_OP_piece 4
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DW_OP_regx $dwarf_regnum
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DW_OP_bit_piece 0 32
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DW_OP_breg0 0
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DW_OP_piece 4
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DW_OP_lit1
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DW_OP_stack_value
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DW_OP_piece 4
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DW_OP_addr 4
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DW_OP_form_tls_address
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DW_OP_piece 4
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} SPECIAL_expr}
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}
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# Define variable 'c' with the conceptually same location
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# description as variable 'a', using the equivalent
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# operations from DW_OP_LLVM_USER_ namespace.
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DW_TAG_variable {
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{DW_AT_name c}
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{DW_AT_type :$int_type_label}
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{DW_AT_location {
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# This is not a meaningful expression. It's a
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# list of all the opcodes we want to be sure we
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# can dump with 'info address'.
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DW_OP_LLVM_user DW_OP_LLVM_USER_push_lane
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DW_OP_lit0
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DW_OP_lit1
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DW_OP_LLVM_user DW_OP_LLVM_USER_form_aspace_address
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DW_OP_LLVM_user DW_OP_LLVM_USER_offset_constu 8
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DW_OP_LLVM_user DW_OP_LLVM_USER_offset
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DW_OP_LLVM_user DW_OP_LLVM_USER_bit_offset
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DW_OP_LLVM_user DW_OP_LLVM_USER_undefined
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DW_OP_LLVM_user DW_OP_LLVM_USER_extend 64 64
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DW_OP_LLVM_user DW_OP_LLVM_USER_select_bit_piece 64 64
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DW_OP_LLVM_user DW_OP_LLVM_USER_piece_end
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DW_OP_LLVM_user DW_OP_LLVM_USER_call_frame_entry_reg $dwarf_regnum
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DW_OP_LLVM_user DW_OP_LLVM_USER_aspace_bregx $dwarf_regnum 0
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} SPECIAL_expr}
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}
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# Define variable 'd' with some extensions that can
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# still be printed.
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DW_TAG_variable {
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{DW_AT_name d}
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{DW_AT_type :$char_type_label}
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{DW_AT_location {
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DW_OP_addr $buf_var
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DW_OP_lit0
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DW_OP_LLVM_form_aspace_address
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DW_OP_LLVM_offset_constu 1
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DW_OP_lit1
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DW_OP_LLVM_offset
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DW_OP_lit16
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DW_OP_LLVM_bit_offset
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DW_OP_LLVM_extend 8 2
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DW_OP_LLVM_undefined
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DW_OP_lit1
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DW_OP_LLVM_select_bit_piece 8 2
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DW_OP_lit4
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DW_OP_LLVM_bit_offset
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DW_OP_bit_piece 8 4
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DW_OP_LLVM_piece_end
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} SPECIAL_expr}
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}
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# Define variable 'e' with the conceptually same location
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# description as variable 'd', using the equivalent
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# operations from DW_OP_LLVM_USER_ namespace.
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DW_TAG_variable {
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{DW_AT_name e}
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{DW_AT_type :$char_type_label}
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{DW_AT_location {
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DW_OP_addr $buf_var
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DW_OP_lit0
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DW_OP_LLVM_user DW_OP_LLVM_USER_form_aspace_address
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DW_OP_LLVM_user DW_OP_LLVM_USER_offset_constu 1
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DW_OP_lit1
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DW_OP_LLVM_user DW_OP_LLVM_USER_offset
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DW_OP_lit16
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DW_OP_LLVM_user DW_OP_LLVM_USER_bit_offset
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DW_OP_LLVM_user DW_OP_LLVM_USER_extend 8 2
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DW_OP_LLVM_user DW_OP_LLVM_USER_undefined
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DW_OP_lit1
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DW_OP_LLVM_user DW_OP_LLVM_USER_select_bit_piece 8 2
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DW_OP_lit4
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DW_OP_LLVM_user DW_OP_LLVM_USER_bit_offset
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DW_OP_bit_piece 8 4
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DW_OP_LLVM_user DW_OP_LLVM_USER_piece_end
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} SPECIAL_expr}
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}
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}
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}
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}
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}
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if { [prepare_for_testing ${testfile}.exp ${testfile} \
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[list $srcfile $asm_file] {nodebug}] } {
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return -1
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}
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if {![runto_main]} {
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return -1
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}
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# Test if all LLVM operations are printed correctly.
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gdb_test "info address a" \
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".*\\: DW_OP_LLVM_push_lane.*\
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.*\\: DW_OP_lit0.*\
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.*\\: DW_OP_lit1.*\
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.*\\: DW_OP_LLVM_form_aspace_address.*\
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.*\\: DW_OP_LLVM_offset_constu 8.*\
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.*\\: DW_OP_LLVM_offset.*\
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.*\\: DW_OP_LLVM_bit_offset.*\
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.*\\: DW_OP_LLVM_undefined.*\
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.*\\: DW_OP_LLVM_extend piece size 64 \\(bits\\) pieces count 64.*\
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.*\\: DW_OP_LLVM_select_bit_piece piece size 64 \\(bits\\) pieces count 64.*\
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.*\\: DW_OP_LLVM_piece_end.*\
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.*\\: DW_OP_LLVM_call_frame_entry_reg register 0 \\\[\\$$regname\\\].*\
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.*\\: DW_OP_LLVM_aspace_bregx register 0 \\\[\\$$regname\\\] offset 0.*"
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# Test if "nice" printout is still backward compatible.
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gdb_test "info address b" \
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".*Symbol \\\"b\\\" is a variable in \\\$$regname \\\[4-byte piece\\\],\
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and a variable in \\\$$regname \\\[0-bit piece, offset 32 bits\\\], and\
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a variable at offset 0 from base reg .* \\\[4-byte piece\\\],\
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and the constant 1 \\\[4-byte piece\\\], and a thread-local variable at\
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offset 0x4 in the thread-local storage for.*\\\[4-byte piece\\\].*"
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# Test if all LLVM USER operations are printed correctly.
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gdb_test "info address c" \
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".*\\: DW_OP_LLVM_user.*1\\: DW_OP_LLVM_USER_push_lane.*\
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.*\\: DW_OP_lit0.*\
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.*\\: DW_OP_lit1.*\
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.*\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_form_aspace_address.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_offset_constu 8.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_offset.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_bit_offset.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_undefined.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_extend piece size 64 \\(bits\\) pieces count 64.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_select_bit_piece piece size 64 \\(bits\\) pieces count 64.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_piece_end.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_call_frame_entry_reg register 0 \\\[\\$$regname\\\].*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_aspace_bregx register 0 \\\[\\$$regname\\\] offset 0.*"
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# Test if variable 'd' location description that uses operations
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# from DW_OP_LLVM_ namespace is printed correctly.
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gdb_test "info address d" \
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".*\\: DW_OP_addr.*\
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.*\\: DW_OP_lit0.*\
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.*\\: DW_OP_LLVM_form_aspace_address.*\
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.*\\: DW_OP_LLVM_offset_constu 1.*\
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.*\\: DW_OP_lit1.*\
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.*\\: DW_OP_LLVM_offset.*\
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.*\\: DW_OP_lit16.*\
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.*\\: DW_OP_LLVM_bit_offset.*\
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.*\\: DW_OP_LLVM_extend piece size 8 \\(bits\\) pieces count 2.*\
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.*\\: DW_OP_LLVM_undefined.*\
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.*\\: DW_OP_lit1.*\
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.*\\: DW_OP_LLVM_select_bit_piece piece size 8 \\(bits\\) pieces count 2.*\
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.*\\: DW_OP_lit4.*\
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.*\\: DW_OP_LLVM_bit_offset.*\
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.*\\: DW_OP_bit_piece size 8 offset 4 \\(bits\\).*\
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.*\\: DW_OP_LLVM_piece_end.*"
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# Test if variable 'd' value is correct.
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gdb_test "print d" " = 4.*"
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# Test if variable 'e' location description that uses operations
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# from DW_OP_LLVM_USER_ namespace is printed correctly.
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gdb_test "info address e" \
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".*\\: DW_OP_addr.*\
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.*\\: DW_OP_lit0.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_form_aspace_address.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_offset_constu 1.*\
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.*\\: DW_OP_lit1.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_offset.*\
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.*\\: DW_OP_lit16.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_bit_offset.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_extend piece size 8 \\(bits\\) pieces count 2.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_undefined.*\
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.*\\: DW_OP_lit1.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_select_bit_piece piece size 8 \\(bits\\) pieces count 2.*\
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.*\\: DW_OP_lit4.*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_bit_offset.*\
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.*\\: DW_OP_bit_piece size 8 offset 4 \\(bits\\).*\
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.*\\: DW_OP_LLVM_user.*\\: DW_OP_LLVM_USER_piece_end.*"
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# Test if variable 'e' value is correct.
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gdb_test "print e" " = 4.*"
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