derek.holloway
7502bf64a4
CodeQL / Analyze (actions) (push) Canceled after 0s
CodeQL / Analyze (python) (push) Canceled after 0s
pre-commit / pre-commit (push) Canceled after 0s
Multi-Arch CI / setup (push) Canceled after 0s
Publish build_manylinux_x86_64 images / publish_build_manylinux_x86_64 (push) Canceled after 0s
Setup (Multi-Arch) / setup (push) Canceled after 0s
Multi-Arch CI / Linux::${{ fromJSON(needs.setup.outputs.linux_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubi10 image / publish_no_rocm_image_ubi10 (push) Canceled after 0s
Multi-Arch CI / Windows::${{ fromJSON(needs.setup.outputs.windows_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Multi-Arch CI / Manifest Diff (push) Canceled after 0s
TheRock Manifest Diff Report / Generate Manifest Diff Report (push) Canceled after 0s
Multi-Arch CI / CI Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_ocl_rt images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_rocgdb images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Unit Tests / Unit Tests :: ubuntu-24.04 (push) Canceled after 0s
Unit Tests / Unit Tests :: windows-2022 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_media (push) Canceled after 0s
Unit Tests / Unit Tests Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_openmpi (push) Canceled after 0s
2050 lines
49 KiB
Plaintext
2050 lines
49 KiB
Plaintext
# Copyright (C) 2021-2024 Free Software Foundation, Inc.
|
|
# Copyright (C) 2021-2024 Advanced Micro Devices, Inc. All rights reserved.
|
|
|
|
# This program is free software; you can redistribute it and/or modify
|
|
# it under the terms of the GNU General Public License as published by
|
|
# the Free Software Foundation; either version 3 of the License, or
|
|
# (at your option) any later version.
|
|
#
|
|
# This program is distributed in the hope that it will be useful,
|
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
# GNU General Public License for more details.
|
|
#
|
|
# You should have received a copy of the GNU General Public License
|
|
# along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
#
|
|
# Test address space support as well as divergent lane support in GDB.
|
|
# Currently only supported on vega20 GPUs.
|
|
|
|
load_lib dwarf.exp
|
|
load_lib rocm.exp
|
|
|
|
require allow_hip_tests
|
|
|
|
# Return the memory address of SYMBOL.
|
|
|
|
proc gdb_symbol_address {symbol} {
|
|
gdb_test_multiple "info address $symbol" "get address of '$symbol'" {
|
|
-wrap -re "Symbol \"$symbol\" is at ($::hex) .*" {
|
|
return $expect_out(1,string)
|
|
}
|
|
}
|
|
return ""
|
|
}
|
|
|
|
# Return the current program counter.
|
|
|
|
proc gdb_pc { } {
|
|
gdb_test_multiple "p/x \$pc" "get pc register" {
|
|
-wrap -re " = ($::hex)" {
|
|
return $expect_out(1,string)
|
|
}
|
|
}
|
|
return ""
|
|
}
|
|
|
|
# Return the current lane execution mask in list form, where each list
|
|
# element represents a particular lane's execution mask bit at the
|
|
# corresponding index.
|
|
|
|
proc gdb_exec_mask { } {
|
|
gdb_test_multiple "p/t \$exec" "get exec register" {
|
|
-wrap -re " = (\[0-1\]+)" {
|
|
set output $expect_out(1,string)
|
|
return [lreverse [split $output {}]]
|
|
}
|
|
}
|
|
return {}
|
|
}
|
|
|
|
# Print EXPR on each active lane and compare the output of each print
|
|
# command against the value found in the LANE_VALUES value list at the
|
|
# same index as that lane.
|
|
|
|
proc gdb_print_active_lanes {expr lane_values} {
|
|
set exec_mask [gdb_exec_mask]
|
|
|
|
set test "print $expr on active lanes"
|
|
|
|
if {[llength $lane_values] < [llength $exec_mask]} {
|
|
fail "$test (bad length)"
|
|
return
|
|
}
|
|
|
|
set i 0
|
|
set result 1
|
|
|
|
foreach active $exec_mask value $lane_values {
|
|
if {$active == "1"} {
|
|
with_test_prefix "$test, lane $i" {
|
|
if {[gdb_test_multiple "lane $i" "switch lane" {
|
|
-wrap -re "Switching to thread \\d+, lane $i .*" {
|
|
}
|
|
}] != 0} {
|
|
set result 0
|
|
continue
|
|
}
|
|
|
|
if {[gdb_test_multiple "print $expr" "print" {
|
|
-wrap -re " = $value" {
|
|
}
|
|
}] != 0} {
|
|
set result 0
|
|
}
|
|
}
|
|
}
|
|
incr i
|
|
}
|
|
|
|
gdb_assert {$result} $test
|
|
}
|
|
|
|
# This test can only be run on targets which support DWARF-2.
|
|
if {![dwarf2_support]} {
|
|
return 0
|
|
}
|
|
|
|
standard_testfile .cpp
|
|
|
|
set gpu_target [lindex [find_amdgpu_devices] 0]
|
|
|
|
# This test can only be run on vega20 GPUs.
|
|
if {$gpu_target != "gfx906"} {
|
|
verbose "skipping vega20 test: $gdb_test_file_name.exp"
|
|
return 0
|
|
}
|
|
|
|
set dwarf_base ${testfile}-kernel-dwarf
|
|
set kernel_base ${testfile}-kernel
|
|
set asmfile_dwarf [standard_output_file $dwarf_base.S]
|
|
set asmfile_kernel $kernel_base.S
|
|
set shlibfile_name $kernel_base.so
|
|
set shlibfile_path [standard_output_file {}]
|
|
set shlibfile [standard_output_file $shlibfile_name]
|
|
|
|
# Wrap DWARF assembling as well, because Dwarf::assemble internally
|
|
# may spawn GDB.
|
|
with_rocm_gpu_lock {
|
|
|
|
# Create the DWARF for the kernel.
|
|
Dwarf::assemble $asmfile_dwarf {
|
|
set const_struct_src [gdb_target_symbol const_struct]
|
|
set const_array_src [gdb_target_symbol const_array]
|
|
|
|
# TODO: Modify the test so that all location lists are using the
|
|
# appropriate assembly labels instead using the DWARF base
|
|
# address (CU's DW_AT_low_pc) plus offset.
|
|
set code_start [gdb_target_symbol GenValue]
|
|
|
|
# Registers used in expressions.
|
|
set wave_size 0x40
|
|
set piece_size 0x40
|
|
set sgpr4_num 36
|
|
set sgpr5_num 37
|
|
set sgpr8_num 40
|
|
set sgpr9_num 41
|
|
set sgpr10_num 42
|
|
set sgpr11_num 43
|
|
set sgpr33_num 65
|
|
set sgpr38_num 70
|
|
set sgpr39_num 71
|
|
set sgpr46_num 78
|
|
set sgpr47_num 79
|
|
set sgpr56_num 88
|
|
set sgpr57_num 89
|
|
set sgpr58_num 90
|
|
set sgpr59_num 91
|
|
set pc_num 16
|
|
set exec_num 17
|
|
set vgpr0_num 2560
|
|
set vgpr1_num 2561
|
|
set vgpr2_num 2562
|
|
set vgpr3_num 2563
|
|
set vgpr4_num 2564
|
|
set vgpr40_num 2600
|
|
set vgpr41_num 2601
|
|
set vgpr42_num 2602
|
|
set vgpr43_num 2603
|
|
|
|
cu {
|
|
version 5
|
|
} {
|
|
DW_TAG_compile_unit {
|
|
{DW_AT_loclists_base cu_table DW_FORM_sec_offset}
|
|
{DW_AT_language @DW_LANG_OpenCL}
|
|
{DW_AT_name <stdin>}
|
|
{DW_AT_producer "clang version 12.0.0"}
|
|
{DW_AT_comp_dir ./}
|
|
{DW_AT_low_pc "GenValue" addr}
|
|
{DW_AT_high_pc "Lfunc_end6" addr}
|
|
{DW_AT_stmt_list 0x0 DW_FORM_sec_offset}
|
|
{DW_AT_ranges 0x0 DW_FORM_sec_offset}
|
|
} {
|
|
declare_labels struct_label local_struct_label int_label \
|
|
local_int_label char_label subrange_label \
|
|
pointer_int_label local_pointer_int_label \
|
|
pointer_struct_label array_32_int_label \
|
|
array_64_int_label unsigned_label \
|
|
local_pointer_struct_label \
|
|
default_lane_pc_expr \
|
|
default_lane_pc_expr_base \
|
|
if_line_61_lane_pc_expr \
|
|
if_line_61_lane_pc_expr_base
|
|
|
|
unsigned_label: DW_TAG_base_type {
|
|
{DW_AT_byte_size 4 DW_FORM_sdata}
|
|
{DW_AT_encoding @DW_ATE_unsigned}
|
|
{DW_AT_name unsigned}
|
|
}
|
|
|
|
subrange_label: DW_TAG_base_type {
|
|
{DW_AT_byte_size 8 DW_FORM_sdata}
|
|
{DW_AT_encoding @DW_ATE_unsigned}
|
|
{DW_AT_name __ARRAY_SIZE_TYPE__}
|
|
}
|
|
|
|
int_label: DW_TAG_base_type {
|
|
{DW_AT_byte_size 4 DW_FORM_sdata}
|
|
{DW_AT_encoding @DW_ATE_signed}
|
|
{DW_AT_name int}
|
|
}
|
|
|
|
local_int_label: DW_TAG_base_type {
|
|
{DW_AT_byte_size 4 DW_FORM_sdata}
|
|
{DW_AT_encoding @DW_ATE_signed}
|
|
{DW_AT_name int}
|
|
}
|
|
|
|
char_label: DW_TAG_base_type {
|
|
{DW_AT_byte_size 1 DW_FORM_sdata}
|
|
{DW_AT_encoding @DW_ATE_signed_char}
|
|
{DW_AT_name char}
|
|
}
|
|
|
|
array_32_int_label: DW_TAG_array_type {
|
|
{DW_AT_type :$int_label}
|
|
} {
|
|
DW_TAG_subrange_type {
|
|
{DW_AT_type :$subrange_label}
|
|
{DW_AT_lower_bound 0 DW_FORM_data1}
|
|
{DW_AT_upper_bound 0x1F DW_FORM_data1}
|
|
}
|
|
}
|
|
|
|
array_64_int_label: DW_TAG_array_type {
|
|
{DW_AT_type :$subrange_label}
|
|
} {
|
|
DW_TAG_subrange_type {
|
|
{DW_AT_type :$subrange_label}
|
|
{DW_AT_lower_bound 0 DW_FORM_data1}
|
|
{DW_AT_upper_bound 0x3f DW_FORM_data1}
|
|
}
|
|
}
|
|
|
|
pointer_int_label: DW_TAG_pointer_type {
|
|
{DW_AT_type :$int_label}
|
|
}
|
|
|
|
local_pointer_int_label: DW_TAG_pointer_type {
|
|
{DW_AT_type :$local_int_label}
|
|
{DW_AT_byte_size 4 DW_FORM_sdata}
|
|
{DW_AT_address_class 0x3 DW_FORM_sdata}
|
|
}
|
|
|
|
struct_label: structure_type {
|
|
{DW_AT_name test_struct}
|
|
{DW_AT_byte_size 0x88 DW_FORM_sdata}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 19 DW_FORM_udata}
|
|
} {
|
|
member {
|
|
{DW_AT_name int_elem}
|
|
{DW_AT_type :$int_label}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 21 DW_FORM_udata}
|
|
{DW_AT_data_member_location 0 DW_FORM_sdata}
|
|
}
|
|
member {
|
|
{DW_AT_name char_elem}
|
|
{DW_AT_type :$char_label}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 22 DW_FORM_udata}
|
|
{DW_AT_data_member_location 4 DW_FORM_sdata}
|
|
}
|
|
member {
|
|
{DW_AT_name array_elem}
|
|
{DW_AT_type :$array_32_int_label}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 23 DW_FORM_udata}
|
|
{DW_AT_data_member_location 0x8 DW_FORM_sdata}
|
|
}
|
|
}
|
|
|
|
pointer_struct_label: DW_TAG_pointer_type {
|
|
{DW_AT_type :$struct_label}
|
|
}
|
|
|
|
# We need to duplicate the type to go around the bug where
|
|
# gdb cashes the target type of a pointer while ignoring
|
|
# the type qualifiers difference between the original
|
|
# pointer and the new one.
|
|
local_struct_label: structure_type {
|
|
{DW_AT_name test_struct}
|
|
{DW_AT_byte_size 0x88 DW_FORM_sdata}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 19 DW_FORM_udata}
|
|
} {
|
|
member {
|
|
{DW_AT_name int_elem}
|
|
{DW_AT_type :$int_label}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 21 DW_FORM_udata}
|
|
{DW_AT_data_member_location 0 DW_FORM_sdata}
|
|
}
|
|
member {
|
|
{DW_AT_name char_elem}
|
|
{DW_AT_type :$char_label}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 22 DW_FORM_udata}
|
|
{DW_AT_data_member_location 4 DW_FORM_sdata}
|
|
}
|
|
member {
|
|
{DW_AT_name array_elem}
|
|
{DW_AT_type :$array_32_int_label}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 23 DW_FORM_udata}
|
|
{DW_AT_data_member_location 0x8 DW_FORM_sdata}
|
|
}
|
|
}
|
|
|
|
local_pointer_struct_label: DW_TAG_pointer_type {
|
|
{DW_AT_type :$local_struct_label}
|
|
{DW_AT_byte_size 4 DW_FORM_sdata}
|
|
{DW_AT_address_class 0x3 DW_FORM_sdata}
|
|
}
|
|
|
|
default_lane_pc_expr_base: DW_TAG_dwarf_procedure {
|
|
{DW_AT_location {
|
|
DW_OP_regx $pc_num
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
DW_OP_regx $exec_num
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
} SPECIAL_expr}
|
|
}
|
|
|
|
default_lane_pc_expr: DW_TAG_dwarf_procedure {
|
|
{DW_AT_location {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
} SPECIAL_expr}
|
|
}
|
|
|
|
if_line_61_lane_pc_expr_base: DW_TAG_dwarf_procedure {
|
|
{DW_AT_location {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
DW_OP_addr VPC_LINE_61
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
DW_OP_regx $sgpr46_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr47_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_regx $sgpr10_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr11_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_or
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
} SPECIAL_expr}
|
|
}
|
|
|
|
if_line_61_lane_pc_expr: DW_TAG_dwarf_procedure {
|
|
{DW_AT_location {
|
|
DW_OP_call4 $if_line_61_lane_pc_expr_base
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
} SPECIAL_expr}
|
|
}
|
|
|
|
# Helper variable to test the gdb divergent lane support.
|
|
DW_TAG_variable {
|
|
{DW_AT_type :$array_64_int_label}
|
|
{DW_AT_name "_lane_pc"}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 37 DW_FORM_udata}
|
|
{DW_AT_location 8 DW_FORM_loclistx}
|
|
}
|
|
|
|
DW_TAG_variable {
|
|
{DW_AT_name const_struct}
|
|
{DW_AT_type :$struct_label}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 26 DW_FORM_udata}
|
|
{DW_AT_location {
|
|
DW_OP_addr $const_struct_src
|
|
} SPECIAL_expr}
|
|
{external 1 flag}
|
|
}
|
|
|
|
DW_TAG_variable {
|
|
{DW_AT_name const_array}
|
|
{DW_AT_type :$array_32_int_label}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 29 DW_FORM_udata}
|
|
{DW_AT_location {
|
|
DW_OP_addr $const_array_src
|
|
} SPECIAL_expr}
|
|
{external 1 flag}
|
|
}
|
|
|
|
DW_TAG_subprogram {
|
|
{DW_AT_name AddrClassTest}
|
|
{DW_AT_low_pc "AddrClassTest" addr}
|
|
{DW_AT_high_pc "Lfunc_end6" addr}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 96 DW_FORM_udata}
|
|
{DW_AT_LLVM_lane_pc 2 DW_FORM_loclistx}
|
|
} {
|
|
DW_TAG_formal_parameter {
|
|
{DW_AT_type :$pointer_int_label}
|
|
{DW_AT_name in}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 96 DW_FORM_udata}
|
|
{DW_AT_location 6 DW_FORM_loclistx}
|
|
}
|
|
|
|
DW_TAG_formal_parameter {
|
|
{DW_AT_type :$pointer_struct_label}
|
|
{DW_AT_name out}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 96 DW_FORM_udata}
|
|
{DW_AT_location 7 DW_FORM_loclistx}
|
|
}
|
|
|
|
DW_TAG_variable {
|
|
{DW_AT_name gid}
|
|
{DW_AT_type :$unsigned_label}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 97 DW_FORM_udata}
|
|
{DW_AT_location {
|
|
DW_OP_regx $vgpr41_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
} SPECIAL_expr}
|
|
{external 1 flag}
|
|
}
|
|
|
|
DW_TAG_variable {
|
|
{DW_AT_name local_struct}
|
|
{DW_AT_type :$struct_label}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 98 DW_FORM_udata}
|
|
{DW_AT_location {
|
|
DW_OP_constu 0x0
|
|
DW_OP_constu 0x3
|
|
DW_OP_LLVM_form_aspace_address
|
|
} SPECIAL_expr}
|
|
{external 1 flag}
|
|
}
|
|
}
|
|
|
|
DW_TAG_subprogram {
|
|
{DW_AT_name GenValue}
|
|
{DW_AT_low_pc "GenValue" addr}
|
|
{DW_AT_high_pc "Lfunc_end2" addr}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 35 DW_FORM_udata}
|
|
{DW_AT_LLVM_lane_pc 3 DW_FORM_loclistx}
|
|
} {
|
|
DW_TAG_variable {
|
|
{DW_AT_type :$array_32_int_label}
|
|
{DW_AT_name array}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 38 DW_FORM_udata}
|
|
{DW_AT_location {
|
|
DW_OP_bregx $sgpr33_num 0
|
|
DW_OP_constu $wave_size
|
|
DW_OP_div
|
|
DW_OP_constu 0x5
|
|
DW_OP_LLVM_form_aspace_address
|
|
} SPECIAL_expr}
|
|
}
|
|
|
|
DW_TAG_variable {
|
|
{DW_AT_name gid}
|
|
{DW_AT_type :$unsigned_label}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 39 DW_FORM_udata}
|
|
{DW_AT_location {
|
|
DW_OP_regx $vgpr0_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
} SPECIAL_expr}
|
|
{external 1 flag}
|
|
}
|
|
|
|
DW_TAG_variable {
|
|
{DW_AT_type :$pointer_int_label}
|
|
{DW_AT_name pconst_array_elem1}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 40 DW_FORM_udata}
|
|
{DW_AT_location {
|
|
DW_OP_regx $vgpr1_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $vgpr2_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
DW_OP_piece 0x4
|
|
} SPECIAL_expr}
|
|
}
|
|
|
|
DW_TAG_variable {
|
|
{DW_AT_type :$pointer_int_label}
|
|
{DW_AT_name pconst_array_elem2}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 40 DW_FORM_udata}
|
|
{DW_AT_location {
|
|
DW_OP_regx $vgpr3_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $vgpr4_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
DW_OP_piece 0x4
|
|
} SPECIAL_expr}
|
|
{external 1 flag}
|
|
}
|
|
}
|
|
|
|
DW_TAG_subprogram {
|
|
{DW_AT_name ChangeLocalContent}
|
|
{DW_AT_low_pc "ChangeLocalContent" addr}
|
|
{DW_AT_high_pc "Lfunc_end3" addr}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 55 DW_FORM_udata}
|
|
{DW_AT_LLVM_lane_pc 5 DW_FORM_loclistx}
|
|
} {
|
|
DW_TAG_formal_parameter {
|
|
{DW_AT_type :$local_pointer_int_label}
|
|
{DW_AT_name plocal_content}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 55 DW_FORM_udata}
|
|
{DW_AT_location 0 DW_FORM_loclistx}
|
|
}
|
|
|
|
DW_TAG_variable {
|
|
{DW_AT_type :$array_32_int_label}
|
|
{DW_AT_name array}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 58 DW_FORM_udata}
|
|
{DW_AT_location {
|
|
DW_OP_bregx $sgpr33_num 0
|
|
DW_OP_constu $wave_size
|
|
DW_OP_div
|
|
DW_OP_constu 0x5
|
|
DW_OP_LLVM_form_aspace_address
|
|
DW_OP_constu 0x10
|
|
DW_OP_LLVM_offset
|
|
} SPECIAL_expr}
|
|
}
|
|
|
|
DW_TAG_variable {
|
|
{DW_AT_name gid}
|
|
{DW_AT_type :$unsigned_label}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 59 DW_FORM_udata}
|
|
{DW_AT_location {
|
|
DW_OP_regx $vgpr40_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
} SPECIAL_expr}
|
|
{external 1 flag}
|
|
}
|
|
|
|
DW_TAG_lexical_block {
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 62 DW_FORM_udata}
|
|
} {
|
|
DW_TAG_variable {
|
|
{DW_AT_name pconst_array_elem}
|
|
{DW_AT_type :$pointer_int_label}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 63 DW_FORM_udata}
|
|
{DW_AT_location {
|
|
DW_OP_regx $vgpr0_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $vgpr1_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
DW_OP_piece 0x4
|
|
} SPECIAL_expr}
|
|
{external 1 flag}
|
|
}
|
|
|
|
DW_TAG_variable {
|
|
{DW_AT_name temp}
|
|
{DW_AT_type :$int_label}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 64 DW_FORM_udata}
|
|
{DW_AT_location {
|
|
DW_OP_regx $vgpr2_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
} SPECIAL_expr}
|
|
{external 1 flag}
|
|
}
|
|
}
|
|
}
|
|
|
|
DW_TAG_subprogram {
|
|
{DW_AT_name SendResults}
|
|
{DW_AT_low_pc "SendResults" addr}
|
|
{DW_AT_high_pc "Lfunc_end4" addr}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 82 DW_FORM_udata}
|
|
{DW_AT_LLVM_lane_pc 4 DW_FORM_loclistx}
|
|
} {
|
|
DW_TAG_formal_parameter {
|
|
{DW_AT_type :$local_pointer_struct_label}
|
|
{DW_AT_name plocal_struct}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 82 DW_FORM_udata}
|
|
{DW_AT_location {
|
|
DW_OP_regx $vgpr42_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
} SPECIAL_expr}
|
|
}
|
|
|
|
DW_TAG_formal_parameter {
|
|
{DW_AT_type :$pointer_struct_label}
|
|
{DW_AT_name out}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 82 DW_FORM_udata}
|
|
{DW_AT_location 1 DW_FORM_loclistx}
|
|
}
|
|
|
|
DW_TAG_variable {
|
|
{DW_AT_name gid}
|
|
{DW_AT_type :$unsigned_label}
|
|
{DW_AT_decl_file 1 DW_FORM_udata}
|
|
{DW_AT_decl_line 84 DW_FORM_udata}
|
|
{DW_AT_location {
|
|
DW_OP_regx $vgpr0_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
} SPECIAL_expr}
|
|
{external 1 flag}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
loclists {} {
|
|
# The lists in this table are accessed by index (DW_FORM_rnglistx).
|
|
table {post-header-label cu_table} {
|
|
|
|
# For variable plocal_content.
|
|
list_ {
|
|
start_length "$code_start + 0x404" 0x30C {
|
|
DW_OP_regx $vgpr0_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
}
|
|
|
|
start_length "$code_start + 0x710" 0x2A4 {
|
|
DW_OP_regx $vgpr41_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
}
|
|
}
|
|
|
|
# For variable plocal_content.
|
|
list_ {
|
|
start_length "$code_start + 0x9b4" 0x98 {
|
|
DW_OP_regx $vgpr1_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $vgpr2_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
DW_OP_piece 0x4
|
|
}
|
|
|
|
start_length "$code_start + 0xa4c" 0x1e8 {
|
|
DW_OP_regx $vgpr40_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $vgpr41_num
|
|
DW_OP_LLVM_push_lane
|
|
DW_OP_constu 0x4
|
|
DW_OP_mul
|
|
DW_OP_LLVM_offset
|
|
DW_OP_piece 0x4
|
|
}
|
|
}
|
|
|
|
# For variable AddrClassTest virtual lane pc.
|
|
list_ {
|
|
start_length "$code_start + 0xc4c" 0x130 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0xe98" 0x1c {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0xf5c" 0x58 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0xdc0" 0xd4 {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_addr VPC_LINE_101_2
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr38_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr39_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_regx $exec_num
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_or
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0xd80" 0x3c {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_addr VPC_LINE_101
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr4_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr5_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_regx $exec_num
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_or
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0xeb8" 0x4c {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_addr VPC_LINE_109
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr4_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr5_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_regx $exec_num
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_or
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0xf08" 0x50 {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_addr VPC_LINE_109_2
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr58_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr59_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_regx $exec_num
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_or
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
}
|
|
|
|
# For variable GenValue virtual lane pc.
|
|
list_ {
|
|
|
|
start_length $code_start 0x33c {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x33c" 0xc {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_addr VPC_LINE_42
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr4_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr5_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0x348" 0x28 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x370" 0x20 {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_addr VPC_LINE_47
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr4_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr5_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0x350" 0x70 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
}
|
|
|
|
# For variable SendResult virtual lane pc.
|
|
list_ {
|
|
start_length "$code_start + 0x9b4" 0xa4 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length 0xa58 0x30 {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_addr VPC_LINE_86
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr4_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr5_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0xa88" 0x1c0 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
}
|
|
|
|
# For variable ChangeLocalContent virtual lane pc.
|
|
list_ {
|
|
|
|
start_length "$code_start + 0x404" 0x3c0 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x8c8" 0x14 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x8f0" 0xc0 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x814" 0x28 {
|
|
DW_OP_call4 $if_line_61_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x878" 0x24 {
|
|
DW_OP_call4 $if_line_61_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x8d8" 0x18 {
|
|
DW_OP_call4 $if_line_61_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x7c8" 0x50 {
|
|
DW_OP_call4 $if_line_61_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x840" 0x40 {
|
|
DW_OP_call4 $if_line_61_lane_pc_expr_base
|
|
|
|
DW_OP_addr VPC_LINE_66
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr46_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr47_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0x8a0" 0xc {
|
|
DW_OP_call4 $if_line_61_lane_pc_expr_base
|
|
|
|
DW_OP_addr VPC_LINE_71
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
DW_OP_regx $sgpr46_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr47_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0x8ac" 0x24 {
|
|
DW_OP_call4 $if_line_61_lane_pc_expr_base
|
|
|
|
DW_OP_addr VPC_LINE_71_2
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
DW_OP_regx $sgpr46_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr47_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
}
|
|
|
|
# For global argument in.
|
|
list_ {
|
|
start_length "$code_start + 0xc4c" 0x44 {
|
|
DW_OP_regx $sgpr8_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr9_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref
|
|
DW_OP_constu 0x0
|
|
DW_OP_LLVM_form_aspace_address
|
|
}
|
|
|
|
start_length "$code_start + 0xc8c" 0x330 {
|
|
DW_OP_regx $sgpr56_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr57_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref
|
|
DW_OP_constu 0x0
|
|
DW_OP_LLVM_form_aspace_address
|
|
}
|
|
}
|
|
|
|
# For global argument out.
|
|
list_ {
|
|
start_length "$code_start + 0xc4c" 0x44 {
|
|
DW_OP_regx $sgpr8_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr9_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref
|
|
DW_OP_constu 0x0
|
|
DW_OP_LLVM_form_aspace_address
|
|
DW_OP_LLVM_offset_constu 0x8
|
|
}
|
|
|
|
start_length "$code_start + 0xc8c" 0x330 {
|
|
DW_OP_regx $sgpr56_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr57_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref
|
|
DW_OP_constu 0x0
|
|
DW_OP_LLVM_form_aspace_address
|
|
DW_OP_LLVM_offset_constu 0x8
|
|
}
|
|
}
|
|
|
|
# For variable lane_pc.
|
|
list_ {
|
|
start_length "$code_start + 0xc4c" 0x130 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0xe98" 0x1c {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0xf5c" 0x58 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0xdc0" 0xd4 {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_addr VPC_LINE_101_2
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr38_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr39_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_regx $exec_num
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_or
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0xd80" 0x3c {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_addr VPC_LINE_101
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr4_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr5_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_regx $exec_num
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_or
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0xeb8" 0x4c {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_addr VPC_LINE_109
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr4_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr5_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_regx $exec_num
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_or
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0xf08" 0x50 {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_addr VPC_LINE_109_2
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr58_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr59_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_regx $exec_num
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_or
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start" 0x33c {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x33c" 0xc {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_addr VPC_LINE_42
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr4_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr5_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0x348" 0x28 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x370" 0x20 {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_addr VPC_LINE_47
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr4_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr5_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0x350" 0x70 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x9b4" 0xa4 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0xa58" 0x30 {
|
|
DW_OP_LLVM_undefined
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_addr VPC_LINE_86
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr4_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr5_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0xa88" 0x1c0 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x404" 0x3c0 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x8c8" 0x14 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x8f0" 0xc0 {
|
|
DW_OP_call4 $default_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x814" 0x28 {
|
|
DW_OP_call4 $if_line_61_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x878" 0x24 {
|
|
DW_OP_call4 $if_line_61_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x8d8" 0x18 {
|
|
DW_OP_call4 $if_line_61_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x7c8" 0x50 {
|
|
DW_OP_call4 $if_line_61_lane_pc_expr
|
|
}
|
|
|
|
start_length "$code_start + 0x840" 0x40 {
|
|
DW_OP_call4 $if_line_61_lane_pc_expr_base
|
|
|
|
DW_OP_addr VPC_LINE_66
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
|
|
DW_OP_regx $sgpr46_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr47_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0x8a0" 0xc {
|
|
DW_OP_call4 $if_line_61_lane_pc_expr_base
|
|
|
|
DW_OP_addr VPC_LINE_71
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
DW_OP_regx $sgpr46_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr47_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
|
|
start_length "$code_start + 0x8ac" 0x24 {
|
|
DW_OP_call4 $if_line_61_lane_pc_expr_base
|
|
|
|
DW_OP_addr VPC_LINE_71_2
|
|
DW_OP_stack_value
|
|
DW_OP_LLVM_extend $piece_size $wave_size
|
|
DW_OP_regx $sgpr46_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_regx $sgpr47_num
|
|
DW_OP_piece 0x4
|
|
DW_OP_LLVM_piece_end
|
|
DW_OP_deref_size 0x8
|
|
DW_OP_LLVM_select_bit_piece $piece_size $wave_size
|
|
|
|
DW_OP_call4 $default_lane_pc_expr_base
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
# Compile the HIP application.
|
|
set cc_flags "-DKERNEL_SO_PATH=\"${shlibfile_path}\"\
|
|
-DKERNEL_SO_NAME=\"${shlibfile_name}\""
|
|
|
|
set options [list debug hip additional_flags=$cc_flags]
|
|
|
|
if { [build_executable "failed to prepare" ${testfile} ${srcfile} \
|
|
${options}] } {
|
|
untested "HIP application failed to compile"
|
|
return -1
|
|
}
|
|
|
|
# Compile OpenCL kernel.
|
|
set asm_options "-target amdgcn-amd-amdhsa -mcpu=$gpu_target"
|
|
|
|
set options [list additional_flags=$asm_options]
|
|
|
|
if { [gdb_compile_ocl_kernel "$asmfile_dwarf ${srcdir}/${subdir}/${asmfile_kernel}" \
|
|
"$shlibfile" $options] != "" } {
|
|
untested "OpenCL kernel debug info failed to assemble"
|
|
return -1
|
|
}
|
|
|
|
clean_restart $binfile
|
|
|
|
# Don't skip over code regions where the current lane is inactive.
|
|
gdb_test_no_output "maint set lane-divergence-support off"
|
|
|
|
# Workaround for
|
|
# https://github.com/RadeonOpenCompute/ROCm/issues/1131.
|
|
gdb_test \
|
|
"set exec-wrapper env 'LD_LIBRARY_PATH=\$LD_LIBRARY_PATH:${rocm_path}/lib'"
|
|
|
|
if ![runto_main] {
|
|
fail "can't run to main"
|
|
return -1
|
|
}
|
|
|
|
gdb_breakpoint "AddrClassTest" "allow-pending"
|
|
|
|
gdb_test_multiple "c" "continue to AddrClassTest" {
|
|
-wrap -re "exited with code .*" {
|
|
# This happens when the program can't open the CL runtime (see
|
|
# workaround above).
|
|
fail "$gdb_test_name (program exited)"
|
|
return -1
|
|
}
|
|
-wrap -re "hit Breakpoint $decimal, with lanes \\\[0-31\\\], AddrClassTest .*" {
|
|
pass $gdb_test_name
|
|
}
|
|
}
|
|
|
|
# Step (or next) using CMD, and expect to stop at line LINENO.
|
|
|
|
proc step_to {cmd lineno} {
|
|
gdb_test $cmd "\r\n${lineno}\t.*"
|
|
}
|
|
|
|
|
|
set gid {
|
|
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
|
|
18 19 20 21 22 23 24 25 26 27 28 29 30 31
|
|
}
|
|
|
|
set private_array \
|
|
"\\{1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4,\
|
|
5, 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8\\}"
|
|
|
|
with_test_prefix "line 97" {
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" \
|
|
" = \\{$pc <repeats 32 times>, <optimized out> <repeats 32 times>\\}"
|
|
|
|
step_to "next" 101
|
|
}
|
|
|
|
with_test_prefix "line 101" {
|
|
gdb_print_active_lanes "gid" $gid
|
|
|
|
gdb_test "print *in@32" \
|
|
" = \\{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,\
|
|
12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,\
|
|
24, 25, 26, 27, 28, 29, 30, 31\\}"
|
|
|
|
gdb_test "print const_struct" \
|
|
" = \\{int_elem = 32, char_elem = 50 '2',\
|
|
array_elem = \\{32, 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18,\
|
|
17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1\\}\\}"
|
|
|
|
gdb_test "print const_array" \
|
|
" = \\{1, 1, 1, 1, 1, 5, 5, 7, 2, 2, 2, 2, 2,\
|
|
5, 5, 10, 3, 3, 3, 3, 3, 5, 5, 2, 4, 4, 4, 4, 4, 5, 5, 3\\}"
|
|
|
|
set lane_aspaces [lrepeat 32 ".*local#.*"]
|
|
|
|
gdb_print_active_lanes "&local_struct" $lane_aspaces
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" \
|
|
" = \\{$pc <repeats 32 times>, <optimized out> <repeats 32 times>\\}"
|
|
|
|
step_to "next 2" 107
|
|
}
|
|
|
|
with_test_prefix "line 107" {
|
|
set lane_values [lrepeat 32 "50 '2'"]
|
|
|
|
gdb_print_active_lanes "local_struct.char_elem" $lane_values
|
|
|
|
set vpc1 [gdb_symbol_address VPC_LINE_101]
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$pc, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $pc, $vpc1,\
|
|
$vpc1, $pc, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $pc,\
|
|
$vpc1, $vpc1, $pc, $vpc1, $vpc1, $pc, $vpc1, $vpc1,\
|
|
$pc, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $pc, $vpc1,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
step_to "next" 103
|
|
}
|
|
|
|
with_test_prefix "line 103" {
|
|
|
|
set vpc1 [gdb_symbol_address VPC_LINE_101_2]
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc,\
|
|
$pc, $vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1,\
|
|
$pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
# Step into GenValue function first time.
|
|
|
|
step_to "step" 37
|
|
}
|
|
|
|
with_test_prefix "line 37" {
|
|
set vpc1 "<optimized out>"
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc,\
|
|
$pc, $vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1,\
|
|
$pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
step_to "next" 39
|
|
}
|
|
|
|
with_test_prefix "line 39" {
|
|
set lane_values [lrepeat 32 $private_array]
|
|
|
|
gdb_print_active_lanes "array" $lane_values
|
|
|
|
set lane_aspaces [lrepeat 32 ".*private_lane#.*"]
|
|
|
|
gdb_print_active_lanes "&array" $lane_aspaces
|
|
|
|
step_to "next" 42
|
|
}
|
|
|
|
with_test_prefix "line 42" {
|
|
gdb_print_active_lanes "gid" $gid
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" ".* =\
|
|
\\{$vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc,\
|
|
$pc, $vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1,\
|
|
$pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
step_to "next 2" 47
|
|
}
|
|
|
|
with_test_prefix "line 47" {
|
|
gdb_print_active_lanes "gid" $gid
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" ".* =\
|
|
\\{$vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc,\
|
|
$pc, $vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1,\
|
|
$pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
step_to "next" 48
|
|
}
|
|
|
|
with_test_prefix "line 48" {
|
|
gdb_print_active_lanes "gid" $gid
|
|
set vpc2 [gdb_symbol_address VPC_LINE_47]
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" ".* =\
|
|
\\{$vpc1, $vpc2, $pc, $vpc1, $pc, $pc, $vpc1, $pc,\
|
|
$vpc2, $vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1,\
|
|
$pc, $pc, $vpc1, $pc, $pc, $vpc1, $vpc2, $pc,\
|
|
$vpc1, $pc, $pc, $vpc1, $pc, $vpc2, $vpc1, $pc,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
step_to "next" 52
|
|
}
|
|
|
|
with_test_prefix "line 52" {
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc,\
|
|
$pc, $vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1,\
|
|
$pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
gdb_print_active_lanes "*pconst_array_elem1" {
|
|
1 1 2 1 2 2 5 2
|
|
2 2 2 2 2 2 2 5
|
|
2 2 2 2 2 2 5 2
|
|
2 2 2 2 2 5 5 2
|
|
}
|
|
|
|
gdb_print_active_lanes "*pconst_array_elem2" {
|
|
1 2 1 1 1 2 5 2
|
|
2 2 2 2 2 2 5 2
|
|
3 2 2 2 3 3 5 2
|
|
2 2 4 4 4 2 2 2
|
|
}
|
|
|
|
# Step out from GenValue function first time.
|
|
|
|
step_to "next" 104
|
|
}
|
|
|
|
with_test_prefix "line 104" {
|
|
set vpc1 [gdb_symbol_address VPC_LINE_101_2]
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc,\
|
|
$pc, $vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1,\
|
|
$pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $vpc1, $pc, $pc, $vpc1, $pc,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
step_to "next" 109
|
|
}
|
|
|
|
with_test_prefix "line 109" {
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" \
|
|
" = \\{$pc <repeats 32 times>,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
set lane_values [lrepeat 32 "\\{int_elem = 249, char_elem = 31.*\\}"]
|
|
|
|
gdb_print_active_lanes "local_struct" $lane_values
|
|
|
|
step_to "next" 112
|
|
}
|
|
|
|
with_test_prefix "line 112" {
|
|
set vpc1 [gdb_symbol_address VPC_LINE_109]
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$pc, $vpc1, $vpc1, $vpc1, $vpc1, $vpc1, $vpc1, $vpc1,\
|
|
$pc, $vpc1, $vpc1, $vpc1, $vpc1, $vpc1, $vpc1, $vpc1,\
|
|
$pc, $vpc1, $vpc1, $vpc1, $vpc1, $vpc1, $vpc1, $vpc1,\
|
|
$pc, $vpc1, $vpc1, $vpc1, $vpc1, $vpc1, $vpc1, $vpc1,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
step_to "next" 110
|
|
}
|
|
|
|
with_test_prefix "line 110" {
|
|
set vpc1 [gdb_symbol_address VPC_LINE_109_2]
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $pc, $pc, $pc, $pc, $pc, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $pc, $pc, $pc, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $pc, $pc, $pc, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $pc, $pc, $pc, $pc, $pc,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
# Step into ChangeLocalContent function.
|
|
|
|
step_to "step" 57
|
|
}
|
|
|
|
with_test_prefix "line 57" {
|
|
set vpc1 "<optimized out>"
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $pc, $pc, $pc, $pc, $pc, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $pc, $pc, $pc, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $pc, $pc, $pc, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $pc, $pc, $pc, $pc, $pc,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
set lane_aspaces [lrepeat 32 ".*local#.*"]
|
|
|
|
gdb_print_active_lanes "plocal_content" $lane_aspaces
|
|
|
|
step_to "next" 59
|
|
}
|
|
|
|
with_test_prefix "line 59" {
|
|
set lane_values [lrepeat 32 $private_array]
|
|
|
|
gdb_print_active_lanes "array" $lane_values
|
|
|
|
set lane_aspaces [lrepeat 32 ".*private_lane#.*"]
|
|
|
|
gdb_print_active_lanes "&array" $lane_aspaces
|
|
|
|
step_to "next" 61
|
|
}
|
|
|
|
with_test_prefix "line 61" {
|
|
gdb_print_active_lanes "gid" $gid
|
|
|
|
step_to "next" 79
|
|
}
|
|
|
|
with_test_prefix "line 79" {
|
|
set vpc1 "<optimized out>"
|
|
set vpc2 [gdb_symbol_address VPC_LINE_61]
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $vpc2, $vpc2, $vpc2, $pc, $vpc2, $vpc2, $vpc2,\
|
|
$vpc1, $vpc2, $vpc2, $vpc2, $pc, $vpc2, $vpc2, $vpc2,\
|
|
$vpc1, $vpc2, $vpc2, $vpc2, $pc, $vpc2, $vpc2, $vpc2,\
|
|
$vpc1, $vpc2, $vpc2, $vpc2, $pc, $vpc2, $vpc2, $vpc2,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
# Step into GenValue function second time.
|
|
|
|
step_to "step" 37
|
|
}
|
|
|
|
with_test_prefix "line 37, 2nd time" {
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $vpc1, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $vpc1,\
|
|
$vpc1, $vpc1, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $vpc1,\
|
|
$vpc1, $vpc1, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $vpc1,\
|
|
$vpc1, $vpc1, $vpc1, $vpc1, $pc,\
|
|
<optimized out> <repeats 35 times>\\}"
|
|
|
|
step_to "next" 39
|
|
}
|
|
|
|
with_test_prefix "line 39, 2nd time" {
|
|
set lane_values [lrepeat 32 $private_array]
|
|
|
|
gdb_print_active_lanes "array" $lane_values
|
|
|
|
set lane_aspaces [lrepeat 32 ".*private_lane#.*"]
|
|
|
|
gdb_print_active_lanes "&array" $lane_aspaces
|
|
|
|
step_to "next" 42
|
|
}
|
|
|
|
with_test_prefix "line 42, 2nd time" {
|
|
|
|
gdb_print_active_lanes "gid" $gid
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $vpc1, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $vpc1,\
|
|
$vpc1, $vpc1, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $vpc1,\
|
|
$vpc1, $vpc1, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $vpc1,\
|
|
$vpc1, $vpc1, $vpc1, $vpc1, $pc,\
|
|
<optimized out> <repeats 35 times>\\}"
|
|
|
|
step_to "next 2" 47
|
|
}
|
|
|
|
with_test_prefix "line 47, 2nd time" {
|
|
|
|
gdb_print_active_lanes "gid" $gid
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $vpc1, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $vpc1,\
|
|
$vpc1, $vpc1, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $vpc1,\
|
|
$vpc1, $vpc1, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $vpc1,\
|
|
$vpc1, $vpc1, $vpc1, $vpc1, $pc,\
|
|
<optimized out> <repeats 35 times>\\}"
|
|
|
|
step_to "next" 48
|
|
}
|
|
|
|
with_test_prefix "line 48, 2nd time" {
|
|
gdb_print_active_lanes "gid" $gid
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $vpc1, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $vpc1,\
|
|
$vpc1, $vpc1, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $vpc1,\
|
|
$vpc1, $vpc1, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $vpc1,\
|
|
$vpc1, $vpc1, $vpc1, $vpc1, $pc,\
|
|
<optimized out> <repeats 35 times>\\}"
|
|
|
|
step_to "next" 52
|
|
}
|
|
|
|
with_test_prefix "line 52, 2nd time" {
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $vpc1, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $vpc1,\
|
|
$vpc1, $vpc1, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $vpc1,\
|
|
$vpc1, $vpc1, $vpc1, $vpc1, $pc, $vpc1, $vpc1, $vpc1,\
|
|
$vpc1, $vpc1, $vpc1, $vpc1, $pc,\
|
|
<optimized out> <repeats 35 times>\\}"
|
|
|
|
gdb_print_active_lanes "*pconst_array_elem1" {
|
|
1 1 2 1 2 2 5 2
|
|
2 2 2 2 2 2 2 5
|
|
2 2 2 2 2 2 5 2
|
|
2 2 2 2 2 5 5 2
|
|
}
|
|
|
|
gdb_print_active_lanes "*pconst_array_elem2" {
|
|
1 2 1 1 1 2 5 2
|
|
2 2 2 2 2 2 5 2
|
|
3 2 2 2 3 3 5 2
|
|
2 2 4 4 4 2 2 2
|
|
}
|
|
|
|
# Step out from GenValue function second time.
|
|
|
|
step_to "next" 66
|
|
}
|
|
|
|
with_test_prefix "line 66" {
|
|
set vpc2 [gdb_symbol_address VPC_LINE_61]
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $pc, $pc, $pc, $vpc2, $pc, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $pc, $vpc2, $pc, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $pc, $vpc2, $pc, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $pc, $vpc2, $pc, $pc, $pc,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
step_to "next" 69
|
|
}
|
|
|
|
with_test_prefix "line 69" {
|
|
set vpc3 [gdb_symbol_address VPC_LINE_66]
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $vpc3, $pc, $vpc3, $vpc2, $vpc3, $pc, $vpc3,\
|
|
$vpc1, $vpc3, $pc, $vpc3, $vpc2, $vpc3, $pc, $vpc3,\
|
|
$vpc1, $vpc3, $pc, $vpc3, $vpc2, $vpc3, $pc, $vpc3,\
|
|
$vpc1, $vpc3, $pc, $vpc3, $vpc2, $vpc3, $pc, $vpc3,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
step_to "next" 71
|
|
}
|
|
|
|
with_test_prefix "line 71" {
|
|
gdb_print_active_lanes "*pconst_array_elem" {
|
|
1 2 1 2 1 2 5 2
|
|
2 2 2 2 2 2 5 2
|
|
3 2 3 2 3 2 5 2
|
|
2 2 4 2 4 2 5 2
|
|
}
|
|
|
|
step_to "next" 74
|
|
}
|
|
|
|
with_test_prefix "line 74" {
|
|
set vpc3 [gdb_symbol_address VPC_LINE_71]
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $vpc3, $pc, $pc, $vpc2, $pc, $pc, $vpc3,\
|
|
$vpc1, $pc, $vpc3, $pc, $vpc2, $vpc3, $pc, $pc,\
|
|
$vpc1, $pc, $pc, $vpc3, $vpc2, $pc, $vpc3, $pc,\
|
|
$vpc1, $vpc3, $pc, $pc, $vpc2, $pc, $pc, $vpc3,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
step_to "next" 72
|
|
}
|
|
|
|
with_test_prefix "line 72" {
|
|
set vpc3 [gdb_symbol_address VPC_LINE_71_2]
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" " =\
|
|
\\{$vpc1, $pc, $vpc3, $vpc3, $vpc2, $vpc3, $vpc3, $pc,\
|
|
$vpc1, $vpc3, $pc, $vpc3, $vpc2, $pc, $vpc3, $vpc3,\
|
|
$vpc1, $vpc3, $vpc3, $pc, $vpc2, $vpc3, $pc, $vpc3,\
|
|
$vpc1, $pc, $vpc3, $vpc3, $vpc2, $vpc3, $vpc3, $pc,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
step_to "next" 76
|
|
}
|
|
|
|
with_test_prefix "line 76" {
|
|
gdb_print_active_lanes "temp" {
|
|
1 1 3 3 3 3 3 2
|
|
2 3 3 3 3 4 3 3
|
|
3 3 3 5 3 3 6 3
|
|
2 7 3 3 3 3 3 8
|
|
}
|
|
|
|
step_to "next" 80
|
|
}
|
|
|
|
with_test_prefix "line 80" {
|
|
gdb_print_active_lanes "*plocal_content" {
|
|
3 3 4 5 4 5 8 4
|
|
4 5 5 5 8 6 8 5
|
|
5 5 6 7 12 5 11 5
|
|
5 9 7 5 16 5 8 10
|
|
}
|
|
|
|
# Step out from ChangeLocalContent function.
|
|
step_to "next" 114
|
|
}
|
|
|
|
with_test_prefix "line 114" {
|
|
set lane_values [lrepeat 32 "\\{1, 3, 4, 5, 4, 5, 8, 4, 2, 5, 5, 5, 8,\
|
|
6, 8, 5, 3, 5, 6, 7, 12, 5, 11, 5, 4, 9, 7, 5, 16, 5, 8, 10\\}"]
|
|
|
|
gdb_print_active_lanes "local_struct.array_elem" $lane_values
|
|
|
|
# Step in SendResults function.
|
|
|
|
step_to "step" 84
|
|
}
|
|
|
|
with_test_prefix "line 84" {
|
|
set lane_aspaces [lrepeat 32 ".*local#.*"]
|
|
|
|
gdb_print_active_lanes "plocal_struct" $lane_aspaces
|
|
|
|
# Check struct members separately too.
|
|
|
|
set lane_values [lrepeat 32 "249"]
|
|
|
|
gdb_print_active_lanes "plocal_struct->int_elem" $lane_values
|
|
|
|
set lane_values [lrepeat 32 "31 .*"]
|
|
|
|
gdb_print_active_lanes "plocal_struct->char_elem" $lane_values
|
|
|
|
set lane_values [lrepeat 32 "\\{1, 3, 4, 5, 4, 5, 8, 4, 2, 5, 5, 5, 8,\
|
|
6, 8, 5, 3, 5, 6, 7, 12, 5, 11, 5, 4, 9, 7, 5, 16, 5, 8, 10\\}"]
|
|
|
|
gdb_print_active_lanes "plocal_struct->array_elem" $lane_values
|
|
|
|
step_to "next" 86
|
|
}
|
|
|
|
with_test_prefix "line 86" {
|
|
gdb_print_active_lanes "gid" $gid
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" \
|
|
" = \\{$pc <repeats 32 times>,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
step_to "next" 88
|
|
}
|
|
|
|
with_test_prefix "line 88" {
|
|
set vpc1 [gdb_symbol_address VPC_LINE_86]
|
|
|
|
set pc [gdb_pc]
|
|
if {$pc == ""} {
|
|
return -1
|
|
}
|
|
|
|
gdb_test "print/x _lane_pc" \
|
|
" = \\{$pc, $vpc1 <repeats 31 times>,\
|
|
<optimized out> <repeats 32 times>\\}"
|
|
|
|
step_to "next" 89
|
|
}
|
|
|
|
with_test_prefix "line 89" {
|
|
gdb_test "print out->int_elem" " = 281"
|
|
|
|
step_to "next" 92
|
|
}
|
|
|
|
with_test_prefix "line 92" {
|
|
gdb_test "print out->char_elem" " = 81 'Q'"
|
|
|
|
step_to "next" 93
|
|
}
|
|
|
|
with_test_prefix "line 93" {
|
|
gdb_test "print out->array_elem" " =\
|
|
\\{34, 35, 35, 35, 33, 37, 39, 36,\
|
|
28, 30, 29, 28, 30, 30, 31, 32,\
|
|
22, 23, 23, 23, 27, 21, 26, 16,\
|
|
16, 20, 17, 14, 24, 13, 15, 14\\}"
|
|
|
|
# Step out from SendResults function.
|
|
step_to "next" 115
|
|
}
|
|
|
|
with_test_prefix "line 115" {
|
|
# Print kernel output.
|
|
gdb_test "print *out" \
|
|
" = \\{int_elem = 281, char_elem = 81 'Q', array_elem =\
|
|
\\{34, 35, 35, 35, 33, 37, 39, 36, 28,\
|
|
30, 29, 28, 30, 30, 31, 32, 22,\
|
|
23, 23, 23, 27, 21, 26, 16, 16,\
|
|
20, 17, 14, 24, 13, 15, 14\\}\\}"
|
|
|
|
# Step out from kernel and finish the test.
|
|
gdb_test "next" "Command aborted, thread exited\\." "next out of kernel"
|
|
}
|
|
|
|
}
|