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114 lines
1.9 KiB
Plaintext
114 lines
1.9 KiB
Plaintext
# Intel(r) Wireless MMX(tm) technology testcase for TEXTRM
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# mach: xscale
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# as: -mcpu=xscale+iwmmxt
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.include "testutils.inc"
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start
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.global textrm
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textrm:
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# Enable access to CoProcessors 0 & 1 before
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# we attempt these instructions.
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mvi_h_gr r1, 3
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mcr p15, 0, r1, cr15, cr1, 0
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# Test Unsigned Byte Wide Extraction
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mvi_h_gr r0, 0x12345678
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mvi_h_gr r1, 0x9abcdef0
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mvi_h_gr r2, 0x111111ff
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tmcrr wr0, r0, r1
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textrmub r2, wr0, #3
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tmrrc r0, r1, wr0
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test_h_gr r0, 0x12345678
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test_h_gr r1, 0x9abcdef0
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test_h_gr r2, 0x00000012
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# Test Signed Byte Wide Extraction
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mvi_h_gr r0, 0x12345678
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mvi_h_gr r1, 0x9abcdef0
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mvi_h_gr r2, 0x111111ff
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tmcrr wr0, r0, r1
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textrmsb r2, wr0, #4
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tmrrc r0, r1, wr0
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test_h_gr r0, 0x12345678
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test_h_gr r1, 0x9abcdef0
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test_h_gr r2, 0xfffffff0
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# Test Unsigned Half Word Wide Extraction
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mvi_h_gr r0, 0x12345678
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mvi_h_gr r1, 0x9abcdef0
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mvi_h_gr r2, 0x111111ff
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tmcrr wr0, r0, r1
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textrmuh r2, wr0, #3
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tmrrc r0, r1, wr0
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test_h_gr r0, 0x12345678
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test_h_gr r1, 0x9abcdef0
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test_h_gr r2, 0x00009abc
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# Test Signed Half Word Wide Extraction
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mvi_h_gr r0, 0x12345678
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mvi_h_gr r1, 0x9abcdef0
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mvi_h_gr r2, 0x111111ff
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tmcrr wr0, r0, r1
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textrmsh r2, wr0, #1
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tmrrc r0, r1, wr0
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test_h_gr r0, 0x12345678
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test_h_gr r1, 0x9abcdef0
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test_h_gr r2, 0x00001234
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# Test Unsigned Word Wide Extraction
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mvi_h_gr r0, 0x12345678
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mvi_h_gr r1, 0x9abcdef0
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mvi_h_gr r2, 0x111111ff
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tmcrr wr0, r0, r1
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textrmuw r2, wr0, #0
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tmrrc r0, r1, wr0
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test_h_gr r0, 0x12345678
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test_h_gr r1, 0x9abcdef0
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test_h_gr r2, 0x12345678
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# Test Signed Word Wide Extraction
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mvi_h_gr r0, 0x12345678
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mvi_h_gr r1, 0x9abcdef0
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mvi_h_gr r2, 0x111111ff
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tmcrr wr0, r0, r1
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textrmsw r2, wr0, #1
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tmrrc r0, r1, wr0
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test_h_gr r0, 0x12345678
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test_h_gr r1, 0x9abcdef0
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test_h_gr r2, 0x9abcdef0
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pass
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