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122 lines
2.4 KiB
Plaintext
122 lines
2.4 KiB
Plaintext
# Intel(r) Wireless MMX(tm) technology testcase for WMAC
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# mach: xscale
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# as: -mcpu=xscale+iwmmxt
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.include "testutils.inc"
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start
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.global wmac
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wmac:
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# Enable access to CoProcessors 0 & 1 before
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# we attempt these instructions.
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mvi_h_gr r1, 3
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mcr p15, 0, r1, cr15, cr1, 0
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# Test Unsigned, Multiply Accumulate, Non-zeroing
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mvi_h_gr r0, 0x12345678
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mvi_h_gr r1, 0x9abcdef0
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mvi_h_gr r2, 0x11111111
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mvi_h_gr r3, 0x22222222
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mvi_h_gr r4, 0x33333333
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mvi_h_gr r5, 0x44444444
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tmcrr wr0, r0, r1
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tmcrr wr1, r2, r3
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tmcrr wr2, r4, r5
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wmacu wr2, wr0, wr1
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tmrrc r0, r1, wr0
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tmrrc r2, r3, wr1
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tmrrc r4, r5, wr2
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test_h_gr r0, 0x12345678
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test_h_gr r1, 0x9abcdef0
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test_h_gr r2, 0x11111111
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test_h_gr r3, 0x22222222
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test_h_gr r4, 0x6c889377
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test_h_gr r5, 0x44444444
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# Test Unsigned, Multiply Accumulate, Zeroing
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mvi_h_gr r0, 0x12345678
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mvi_h_gr r1, 0x9abcdef0
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mvi_h_gr r2, 0x11111111
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mvi_h_gr r3, 0x22222222
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mvi_h_gr r4, 0x33333333
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mvi_h_gr r5, 0x44444444
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tmcrr wr0, r0, r1
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tmcrr wr1, r2, r3
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tmcrr wr2, r4, r5
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wmacuz wr2, wr0, wr1
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tmrrc r0, r1, wr0
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tmrrc r2, r3, wr1
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tmrrc r4, r5, wr2
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test_h_gr r0, 0x12345678
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test_h_gr r1, 0x9abcdef0
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test_h_gr r2, 0x11111111
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test_h_gr r3, 0x22222222
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test_h_gr r4, 0x39556044
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test_h_gr r5, 0x00000000
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# Test Signed, Multiply Accumulate, Non-zeroing
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mvi_h_gr r0, 0x12345678
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mvi_h_gr r1, 0x9abcdef0
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mvi_h_gr r2, 0x11111111
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mvi_h_gr r3, 0x22222222
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mvi_h_gr r4, 0x33333333
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mvi_h_gr r5, 0x44444444
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tmcrr wr0, r0, r1
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tmcrr wr1, r2, r3
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tmcrr wr2, r4, r5
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wmacs wr2, wr0, wr1
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tmrrc r0, r1, wr0
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tmrrc r2, r3, wr1
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tmrrc r4, r5, wr2
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test_h_gr r0, 0x12345678
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test_h_gr r1, 0x9abcdef0
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test_h_gr r2, 0x11111111
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test_h_gr r3, 0x22222222
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test_h_gr r4, 0x28449377
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test_h_gr r5, 0x44444444
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# Test Signed, Multiply Accumulate, Zeroing
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mvi_h_gr r0, 0x12345678
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mvi_h_gr r1, 0x9abcdef0
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mvi_h_gr r2, 0x11111111
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mvi_h_gr r3, 0x22222222
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mvi_h_gr r4, 0x33333333
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mvi_h_gr r5, 0x44444444
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tmcrr wr0, r0, r1
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tmcrr wr1, r2, r3
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tmcrr wr2, r4, r5
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wmacsz wr2, wr0, wr1
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tmrrc r0, r1, wr0
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tmrrc r2, r3, wr1
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tmrrc r4, r5, wr2
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test_h_gr r0, 0x12345678
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test_h_gr r1, 0x9abcdef0
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test_h_gr r2, 0x11111111
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test_h_gr r3, 0x22222222
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test_h_gr r4, 0xf5116044
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test_h_gr r5, 0xffffffff
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pass
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