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83 lines
1.3 KiB
ArmAsm
83 lines
1.3 KiB
ArmAsm
//Original:/testcases/core/c_dsp32alu_a0a1s/c_dsp32alu_a0a1s.dsp
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// Spec Reference: dsp32alu a0a1s
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# mach: bfin
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.include "testutils.inc"
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start
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A1 = A0 = 0;
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imm32 r0, 0x15678911;
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imm32 r1, 0xa789ab1d;
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imm32 r2, 0xd4445515;
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imm32 r3, 0xf6667717;
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imm32 r4, 0xe567891b;
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imm32 r5, 0x6789ab1d;
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imm32 r6, 0xb4445515;
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imm32 r7, 0x86667777;
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// A0 & A1 types
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A0 = R0;
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A1 = R1;
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R6 = A0.w;
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R7 = A1.w;
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A0 = 0;
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A1 = 0;
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R0 = A0.w;
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R1 = A1.w;
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A0 = R2;
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A1 = R3;
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A0 = A0 (S);
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A1 = A1 (S);
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R4 = A0.w;
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R5 = A1.w;
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A0 = A1;
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R2 = A0.w;
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A0 = R3;
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A1 = A0;
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R3 = A1.w;
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CHECKREG r0, 0x00000000;
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CHECKREG r1, 0x00000000;
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CHECKREG r2, 0xF6667717;
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CHECKREG r3, 0xF6667717;
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CHECKREG r4, 0xD4445515;
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CHECKREG r5, 0xF6667717;
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CHECKREG r6, 0x15678911;
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CHECKREG r7, 0xA789AB1D;
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A1 = A0 = 0;
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R0 = A0.w;
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R1 = A1.w;
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CHECKREG r0, 0x00000000;
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CHECKREG r1, 0x00000000;
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imm32 r0, 0xa1567891;
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imm32 r1, 0xba789abd;
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imm32 r2, 0xcd412355;
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imm32 r3, 0xdf646777;
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imm32 r4, 0xe567891b;
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imm32 r5, 0x6789ab1d;
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imm32 r6, 0xb4445515;
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imm32 r7, 0xf666aeb7;
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A0 = R4;
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A1 = R5;
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R0 = A0.w;
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R1 = A1.w;
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A0 = R6;
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A1 = R7;
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R2 = A0.w;
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R3 = A1.w;
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CHECKREG r0, 0xE567891B;
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CHECKREG r1, 0x6789AB1D;
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CHECKREG r2, 0xB4445515;
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CHECKREG r3, 0xF666AEB7;
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CHECKREG r4, 0xE567891B;
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CHECKREG r5, 0x6789AB1D;
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CHECKREG r6, 0xB4445515;
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CHECKREG r7, 0xF666AEB7;
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pass
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