derek.holloway
7502bf64a4
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262 lines
5.6 KiB
ArmAsm
262 lines
5.6 KiB
ArmAsm
//Original:/testcases/core/c_dsp32alu_min/c_dsp32alu_min.dsp
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// Spec Reference: dsp32alu dregs = min ( dregs, dregs)
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# mach: bfin
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.include "testutils.inc"
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start
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imm32 r0, 0x35678911;
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imm32 r1, 0x2789ab1d;
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imm32 r2, 0x74445515;
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imm32 r3, 0xf6667717;
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imm32 r4, 0x5567891b;
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imm32 r5, 0x6789ab1d;
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imm32 r6, 0x74445515;
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imm32 r7, 0x86667777;
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R0 = MIN ( R0 , R0 );
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R1 = MIN ( R0 , R1 );
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R2 = MIN ( R0 , R2 );
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R3 = MIN ( R0 , R3 );
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R4 = MIN ( R0 , R4 );
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R5 = MIN ( R0 , R5 );
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R6 = MIN ( R0 , R6 );
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R7 = MIN ( R0 , R7 );
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CHECKREG r0, 0x35678911;
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CHECKREG r1, 0x2789AB1D;
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CHECKREG r2, 0x35678911;
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CHECKREG r3, 0xF6667717;
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CHECKREG r4, 0x35678911;
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CHECKREG r5, 0x35678911;
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CHECKREG r6, 0x35678911;
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CHECKREG r7, 0x86667777;
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imm32 r0, 0x9567892b;
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imm32 r1, 0xa789ab2d;
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imm32 r2, 0xb4445525;
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imm32 r3, 0xc6667727;
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imm32 r4, 0xd8889929;
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imm32 r5, 0xeaaabb2b;
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imm32 r6, 0xfcccdd2d;
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imm32 r7, 0x0eeeffff;
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R0 = MIN ( R1 , R0 );
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R1 = MIN ( R1 , R1 );
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R2 = MIN ( R1 , R2 );
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R3 = MIN ( R1 , R3 );
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R4 = MIN ( R1 , R4 );
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R5 = MIN ( R1 , R5 );
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R6 = MIN ( R1 , R6 );
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R7 = MIN ( R1 , R7 );
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CHECKREG r0, 0x9567892B;
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CHECKREG r1, 0xA789AB2D;
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CHECKREG r2, 0xA789AB2D;
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CHECKREG r3, 0xA789AB2D;
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CHECKREG r4, 0xA789AB2D;
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CHECKREG r5, 0xA789AB2D;
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CHECKREG r6, 0xA789AB2D;
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CHECKREG r7, 0xA789AB2D;
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imm32 r0, 0x716789ab;
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imm32 r1, 0x8289abcd;
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imm32 r2, 0x93445555;
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imm32 r3, 0xa4667777;
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imm32 r4, 0x456789ab;
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imm32 r5, 0xb689abcd;
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imm32 r6, 0x47445555;
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imm32 r7, 0x68667777;
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R0 = MIN ( R2 , R0 );
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R1 = MIN ( R2 , R1 );
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R2 = MIN ( R2 , R2 );
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R3 = MIN ( R2 , R3 );
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R4 = MIN ( R2 , R4 );
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R5 = MIN ( R2 , R5 );
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R6 = MIN ( R2 , R6 );
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R7 = MIN ( R2 , R7 );
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CHECKREG r0, 0x93445555;
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CHECKREG r1, 0x8289ABCD;
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CHECKREG r2, 0x93445555;
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CHECKREG r3, 0x93445555;
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CHECKREG r4, 0x93445555;
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CHECKREG r5, 0x93445555;
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CHECKREG r6, 0x93445555;
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CHECKREG r7, 0x93445555;
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imm32 r0, 0x2567892b;
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imm32 r1, 0x5789ab2d;
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imm32 r2, 0xb4445525;
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imm32 r3, 0xc6667727;
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imm32 r0, 0x9567892b;
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imm32 r1, 0xa789ab2d;
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imm32 r2, 0xb4445525;
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imm32 r3, 0xc6667727;
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R0 = MIN ( R3 , R0 );
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R1 = MIN ( R3 , R1 );
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R2 = MIN ( R3 , R2 );
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R3 = MIN ( R3 , R3 );
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R4 = MIN ( R3 , R4 );
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R5 = MIN ( R3 , R5 );
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R6 = MIN ( R3 , R6 );
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R7 = MIN ( R3 , R7 );
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CHECKREG r0, 0x9567892B;
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CHECKREG r1, 0xA789AB2D;
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CHECKREG r2, 0xB4445525;
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CHECKREG r3, 0xC6667727;
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CHECKREG r4, 0x93445555;
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CHECKREG r5, 0x93445555;
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CHECKREG r6, 0x93445555;
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CHECKREG r7, 0x93445555;
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imm32 r0, 0xd537891b;
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imm32 r1, 0x6759ab2d;
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imm32 r2, 0xf455b535;
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imm32 r3, 0x66665747;
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imm32 r4, 0x88789565;
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imm32 r5, 0xaa8abb5b;
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imm32 r6, 0xcc9cdd85;
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imm32 r7, 0xeeaeff9f;
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R0 = MIN ( R4 , R0 );
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R1 = MIN ( R4 , R1 );
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R2 = MIN ( R4 , R2 );
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R3 = MIN ( R4 , R3 );
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R4 = MIN ( R4 , R4 );
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R5 = MIN ( R4 , R5 );
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R6 = MIN ( R4 , R6 );
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R7 = MIN ( R4 , R7 );
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CHECKREG r0, 0x88789565;
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CHECKREG r1, 0x88789565;
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CHECKREG r2, 0x88789565;
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CHECKREG r3, 0x88789565;
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CHECKREG r4, 0x88789565;
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CHECKREG r5, 0x88789565;
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CHECKREG r6, 0x88789565;
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CHECKREG r7, 0x88789565;
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imm32 r0, 0xa56b89ab;
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imm32 r1, 0x69764bcd;
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imm32 r2, 0x49736564;
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imm32 r3, 0x61278394;
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imm32 r4, 0x98876439;
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imm32 r5, 0xaaaa0bbb;
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imm32 r6, 0xcccc1ddd;
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imm32 r7, 0x12346fff;
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R0 = MIN ( R5 , R0 );
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R1 = MIN ( R5 , R1 );
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R2 = MIN ( R5 , R2 );
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R3 = MIN ( R5 , R3 );
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R4 = MIN ( R5 , R4 );
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R5 = MIN ( R5 , R5 );
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R6 = MIN ( R5 , R6 );
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R7 = MIN ( R5 , R7 );
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CHECKREG r0, 0xA56B89AB;
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CHECKREG r1, 0xAAAA0BBB;
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CHECKREG r2, 0xAAAA0BBB;
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CHECKREG r3, 0xAAAA0BBB;
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CHECKREG r4, 0x98876439;
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CHECKREG r5, 0xAAAA0BBB;
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CHECKREG r6, 0xAAAA0BBB;
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CHECKREG r7, 0xAAAA0BBB;
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imm32 r0, 0xe56739ab;
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imm32 r1, 0x67694bcd;
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imm32 r2, 0x03456755;
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imm32 r3, 0x66666777;
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imm32 r4, 0xd2345699;
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imm32 r5, 0x45678b6b;
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imm32 r6, 0x043290d6;
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imm32 r7, 0x1234567f;
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R0 = MIN ( R6 , R0 );
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R1 = MIN ( R6 , R1 );
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R2 = MIN ( R6 , R2 );
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R3 = MIN ( R6 , R3 );
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R4 = MIN ( R6 , R4 );
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R5 = MIN ( R6 , R5 );
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R6 = MIN ( R6 , R6 );
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R7 = MIN ( R6 , R7 );
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CHECKREG r0, 0xE56739AB;
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CHECKREG r1, 0x043290D6;
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CHECKREG r2, 0x03456755;
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CHECKREG r3, 0x043290D6;
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CHECKREG r4, 0xD2345699;
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CHECKREG r5, 0x043290D6;
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CHECKREG r6, 0x043290D6;
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CHECKREG r7, 0x043290D6;
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imm32 r0, 0x476789ab;
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imm32 r1, 0x6779abcd;
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imm32 r2, 0x23456755;
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imm32 r3, 0x56789007;
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imm32 r4, 0x789ab799;
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imm32 r5, 0xaaaa0bbb;
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imm32 r6, 0x89ab1d7d;
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imm32 r7, 0xabcd2ff7;
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R0 = MIN ( R7 , R0 );
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R1 = MIN ( R7 , R1 );
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R2 = MIN ( R7 , R2 );
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R3 = MIN ( R7 , R3 );
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R4 = MIN ( R7 , R4 );
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R5 = MIN ( R7 , R5 );
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R6 = MIN ( R7 , R6 );
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R7 = MIN ( R7 , R7 );
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CHECKREG r0, 0xABCD2FF7;
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CHECKREG r1, 0xABCD2FF7;
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CHECKREG r2, 0xABCD2FF7;
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CHECKREG r3, 0xABCD2FF7;
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CHECKREG r4, 0xABCD2FF7;
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CHECKREG r5, 0xAAAA0BBB;
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CHECKREG r6, 0x89AB1D7D;
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CHECKREG r7, 0xABCD2FF7;
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imm32 r0, 0x456739ab;
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imm32 r1, 0x67694bcd;
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imm32 r2, 0xd3456755;
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imm32 r3, 0x66666777;
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imm32 r4, 0x12345699;
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imm32 r5, 0x45678b6b;
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imm32 r6, 0xb43290d6;
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imm32 r7, 0x1234567f;
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R4 = MIN ( R4 , R7 );
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R5 = MIN ( R5 , R5 );
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R2 = MIN ( R6 , R3 );
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R6 = MIN ( R0 , R4 );
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R0 = MIN ( R1 , R6 );
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R2 = MIN ( R2 , R1 );
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R1 = MIN ( R3 , R0 );
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R7 = MIN ( R7 , R4 );
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CHECKREG r0, 0x1234567F;
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CHECKREG r1, 0x1234567F;
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CHECKREG r2, 0xB43290D6;
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CHECKREG r3, 0x66666777;
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CHECKREG r4, 0x1234567F;
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CHECKREG r5, 0x45678B6B;
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CHECKREG r6, 0x1234567F;
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CHECKREG r7, 0x1234567F;
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imm32 r0, 0xa76789ab;
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imm32 r1, 0x6779abcd;
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imm32 r2, 0xf3456755;
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imm32 r3, 0x56789007;
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imm32 r4, 0x789ab799;
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imm32 r5, 0xaaaa0bbb;
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imm32 r6, 0x89ab1d7d;
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imm32 r7, 0xabcd2ff7;
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R3 = MIN ( R4 , R0 );
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R5 = MIN ( R5 , R1 );
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R2 = MIN ( R2 , R2 );
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R7 = MIN ( R7 , R3 );
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R4 = MIN ( R3 , R4 );
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R0 = MIN ( R1 , R5 );
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R1 = MIN ( R0 , R6 );
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R6 = MIN ( R6 , R7 );
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CHECKREG r0, 0xAAAA0BBB;
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CHECKREG r1, 0x89AB1D7D;
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CHECKREG r2, 0xF3456755;
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CHECKREG r3, 0xA76789AB;
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CHECKREG r4, 0xA76789AB;
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CHECKREG r5, 0xAAAA0BBB;
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CHECKREG r6, 0x89AB1D7D;
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CHECKREG r7, 0xA76789AB;
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pass
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