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93 lines
2.4 KiB
ArmAsm
93 lines
2.4 KiB
ArmAsm
//Original:/testcases/core/c_logi2op_bitclr/c_logi2op_bitclr.dsp
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// Spec Reference: Logi2op functions: bitclr
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# mach: bfin
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.include "testutils.inc"
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start
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imm32 r0, 0xffffffff;
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imm32 r1, 0xffffffff;
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imm32 r2, 0xffffffff;
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imm32 r3, 0xffffffff;
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imm32 r4, 0xffffffff;
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imm32 r5, 0xffffffff;
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imm32 r6, 0xffffffff;
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imm32 r7, 0xffffffff;
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// bit clr
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BITCLR( R0 , 0 ); /* r0 = 0x00000001 */
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BITCLR( R1 , 1 ); /* r1 = 0x00000002 */
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BITCLR( R2 , 2 ); /* r2 = 0x00000004 */
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BITCLR( R3 , 3 ); /* r3 = 0x00000008 */
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BITCLR( R4 , 4 ); /* r4 = 0x00000010 */
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BITCLR( R5 , 5 ); /* r5 = 0x00000020 */
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BITCLR( R6 , 6 ); /* r6 = 0x00000040 */
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BITCLR( R7 , 7 ); /* r7 = 0x00000080 */
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CHECKREG r0, 0xfffffffe;
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CHECKREG r1, 0xfffffffd;
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CHECKREG r2, 0xfffffffb;
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CHECKREG r3, 0xfffffff7;
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CHECKREG r4, 0xffffffef;
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CHECKREG r5, 0xffffffdf;
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CHECKREG r6, 0xffffffbf;
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CHECKREG r7, 0xffffff7f;
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// bit clr
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BITCLR( R0 , 8 ); /* r0 = 0x00000100 */
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BITCLR( R1 , 9 ); /* r1 = 0x00000200 */
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BITCLR( R2 , 10 ); /* r2 = 0x00000400 */
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BITCLR( R3 , 11 ); /* r3 = 0x00000800 */
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BITCLR( R4 , 12 ); /* r4 = 0x00001000 */
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BITCLR( R5 , 13 ); /* r5 = 0x00002000 */
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BITCLR( R6 , 14 ); /* r6 = 0x00004000 */
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BITCLR( R7 , 15 ); /* r7 = 0x00008000 */
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CHECKREG r0, 0xfffffefe;
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CHECKREG r1, 0xfffffdfd;
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CHECKREG r2, 0xfffffbfb;
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CHECKREG r3, 0xfffff7f7;
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CHECKREG r4, 0xffffefef;
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CHECKREG r5, 0xffffdfdf;
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CHECKREG r6, 0xffffbfbf;
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CHECKREG r7, 0xffff7f7f;
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// bit clr
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BITCLR( R0 , 16 ); /* r0 = 0x00000100 */
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BITCLR( R1 , 17 ); /* r1 = 0x00000200 */
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BITCLR( R2 , 18 ); /* r2 = 0x00000400 */
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BITCLR( R3 , 19 ); /* r3 = 0x00000800 */
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BITCLR( R4 , 20 ); /* r4 = 0x00001000 */
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BITCLR( R5 , 21 ); /* r5 = 0x00002000 */
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BITCLR( R6 , 22 ); /* r6 = 0x00004000 */
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BITCLR( R7 , 23 ); /* r7 = 0x00008000 */
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CHECKREG r0, 0xfffefefe;
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CHECKREG r1, 0xfffdfdfd;
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CHECKREG r2, 0xfffbfbfb;
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CHECKREG r3, 0xfff7f7f7;
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CHECKREG r4, 0xffefefef;
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CHECKREG r5, 0xffdfdfdf;
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CHECKREG r6, 0xffbfbfbf;
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CHECKREG r7, 0xff7f7f7f;
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// bit clr
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BITCLR( R0 , 24 ); /* r0 = 0x00000100 */
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BITCLR( R1 , 25 ); /* r1 = 0x00000200 */
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BITCLR( R2 , 26 ); /* r2 = 0x00000400 */
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BITCLR( R3 , 27 ); /* r3 = 0x00000800 */
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BITCLR( R4 , 28 ); /* r4 = 0x00001000 */
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BITCLR( R5 , 29 ); /* r5 = 0x00002000 */
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BITCLR( R6 , 30 ); /* r6 = 0x00004000 */
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BITCLR( R7 , 31 ); /* r7 = 0x00008000 */
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CHECKREG r0, 0xfefefefe;
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CHECKREG r1, 0xfdfdfdfd;
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CHECKREG r2, 0xfbfbfbfb;
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CHECKREG r3, 0xf7f7f7f7;
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CHECKREG r4, 0xefefefef;
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CHECKREG r5, 0xdfdfdfdf;
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CHECKREG r6, 0xbfbfbfbf;
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CHECKREG r7, 0x7f7f7f7f;
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pass
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