derek.holloway
7502bf64a4
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417 lines
22 KiB
ArmAsm
417 lines
22 KiB
ArmAsm
# Check that carry for addition and subtraction works.
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# mach: pru
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# Copyright (C) 2023-2024 Free Software Foundation, Inc.
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# Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
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#
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# This file is part of the GNU simulators.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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.include "testutils.inc"
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# Helper macro to exercise three consecutive
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# instructions using the carry bit.
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.macro test_seq srcmode, dstmode, init0, init1, init2, init3, alu0, alu1, alu2, expected
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# In case srcmode>dstmode, "garbage" in the r20 MSB
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# bits could falsely be interpreted as carry.
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# So start with initialized destination to make tests consistent.
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ldi r20, 0
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ldi32 r15, \init0
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ldi32 r16, \init1
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ldi32 r17, \init2
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ldi32 r18, \init3
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ldi32 r0, \expected
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\alu0 r20\dstmode, r15\srcmode, r16\srcmode
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\alu1 r20\dstmode, r20\srcmode, r17\srcmode
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\alu2 r20\dstmode, r20\srcmode, r18\srcmode
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qbeq 1f, r0, r20\dstmode
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jmp EXIT_FAIL
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1:
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.endm
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# Helper macro to verify one ALU instruction
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# using the carry bit.
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.macro test1 alu, dstmode, src0mode, src0init, src1mode, src1init, expected
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ldi32 r15, \src0init
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ldi32 r16, \src1init
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ldi32 r0, \expected
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\alu r20\dstmode, r15\src0mode, r16\src1mode
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qbeq 1f, r0, r20\dstmode
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jmp EXIT_FAIL
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1:
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.endm
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start
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# ***** ADD 32-bit dst, 32-bit src *****
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# {add, clear carry}
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test1 add, " ", " ", 0x00000000, " ", 0x00000000, 0x00000000
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# {add with carry=0, clear carry}
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test1 adc, " ", " ", 0x00000000, " ", 0x00000000, 0x00000000
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# {add with carry=0, set carry}
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test1 adc, " ", " ", 0x00000001, " ", 0xffffffff, 0x00000000
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# {add with carry=1, set carry}
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test1 adc, " ", " ", 0x00000010, " ", 0xfffffffe, 0x0000000f
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# {add with carry=1, clear carry}
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test1 adc, " ", " ", 0x00000010, " ", 0x0ffffffe, 0x1000000f
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# {add with carry=0, set carry}
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test1 adc, " ", " ", 0x00000001, " ", 0xffffffff, 0x00000000
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# {add, set carry}
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test1 add, " ", " ", 0x00000001, " ", 0xffffffff, 0x00000000
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# {add with carry=1, set carry}
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test1 adc, " ", " ", 0x00000010, " ", 0xfffffffe, 0x0000000f
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# ***** ADD 32-bit dst, 16-bit src *****
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test1 add, " ", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
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test1 adc, " ", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
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test1 adc, " ", ".w0", 0x00000003, ".w0", 0xffffffff, 0x00010002
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test1 adc, " ", ".w0", 0x00000010, ".w0", 0x0000fffe, 0x0001000e
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# ***** ADD 32-bit dst, 8-bit src *****
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test1 add, " ", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
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test1 adc, " ", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
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test1 adc, " ", ".b0", 0x00000003, ".b0", 0xffffffff, 0x00000102
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test1 adc, " ", ".b0", 0x00000010, ".b0", 0x0000f0fe, 0x0000010e
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# ***** ADD 16-bit dst, 32-bit src *****
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test1 add, ".w0", " ", 0x00000000, " ", 0x00000000, 0x00000000
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test1 adc, ".w0", " ", 0x00000000, " ", 0x00000000, 0x00000000
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test1 adc, ".w0", " ", 0x00000001, " ", 0xfff0ffff, 0x00000000
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test1 adc, ".w0", " ", 0x00000010, " ", 0x0000fffe, 0x0000000f
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test1 adc, ".w0", " ", 0x00000010, " ", 0x00000ffe, 0x0000100f
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test1 adc, ".w0", " ", 0x00000001, " ", 0x0000ffff, 0x00000000
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test1 add, ".w0", " ", 0x00000001, " ", 0x0000ffff, 0x00000000
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test1 adc, ".w0", " ", 0x00000010, " ", 0x0000fffe, 0x0000000f
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# Test when intermediate sum sets the carry.
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test1 add, ".w0", " ", 0x00010000, " ", 0x00000000, 0x00000000
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test1 adc, ".w0", " ", 0x00000000, " ", 0x00000000, 0x00000001
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test1 add, ".w0", " ", 0x00020000, " ", 0x00000000, 0x00000000
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test1 adc, ".w0", " ", 0x00000000, " ", 0x00000000, 0x00000000
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# ***** ADD 16-bit dst, 16-bit src *****
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test1 add, ".w0", ".w0", 0x00000210, ".w0", 0x00000130, 0x00000340
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test1 adc, ".w0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
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test1 adc, ".w0", ".w0", 0x00000001, ".w0", 0xffffffff, 0x00000000
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test1 adc, ".w0", ".w0", 0x00000010, ".w0", 0xfffffffe, 0x0000000f
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test1 adc, ".w0", ".w0", 0x00000010, ".w0", 0x00000ffe, 0x0000100f
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test1 adc, ".w0", ".w0", 0x00000001, ".w0", 0xfff0ffff, 0x00000000
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test1 add, ".w0", ".w0", 0x00000001, ".w0", 0xfff0ffff, 0x00000000
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test1 adc, ".w0", ".w0", 0x00000010, ".w0", 0xfff1fffe, 0x0000000f
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# ***** ADD 16-bit dst, 8-bit src *****
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test1 add, ".w0", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
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test1 adc, ".w0", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
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test1 adc, ".w0", ".b0", 0x00000003, ".b0", 0xffffffff, 0x00000102
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test1 adc, ".w0", ".b0", 0x00000010, ".b0", 0x0000f0fe, 0x0000010e
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# ***** ADD 8-bit dst, 32-bit src *****
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test1 add, ".b0", " ", 0x00000000, " ", 0x00000000, 0x00000000
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test1 adc, ".b0", " ", 0x00000000, " ", 0x00000000, 0x00000000
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test1 adc, ".b0", " ", 0x00000001, " ", 0x000000ff, 0x00000000
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test1 adc, ".b0", " ", 0x00000010, " ", 0x000000fe, 0x0000000f
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test1 adc, ".b0", " ", 0x00000021, " ", 0x0000001e, 0x00000040
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test1 adc, ".b0", " ", 0x00000001, " ", 0x000000ff, 0x00000000
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test1 add, ".b0", " ", 0x00000001, " ", 0x000000ff, 0x00000000
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test1 adc, ".b0", " ", 0x00000010, " ", 0x000000fe, 0x0000000f
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# Test when intermediate sum sets the carry.
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test1 add, ".b0", " ", 0x10000100, " ", 0x00000000, 0x00000000
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test1 adc, ".b0", " ", 0x00000000, " ", 0x00000000, 0x00000001
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# ***** ADD 8-bit dst, 16-bit src *****
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test1 add, ".b0", ".w0", 0x10000000, ".w0", 0x00000000, 0x00000000
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test1 adc, ".b0", ".w0", 0x02000000, ".w0", 0x00000000, 0x00000000
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test1 adc, ".b0", ".w0", 0x00030001, ".w0", 0x000000ff, 0x00000000
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test1 adc, ".b0", ".w0", 0x00004010, ".w0", 0x000000fe, 0x0000000f
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test1 adc, ".b0", ".w0", 0x00000021, ".w0", 0x0000001e, 0x00000040
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test1 adc, ".b0", ".w0", 0x00000001, ".w0", 0x000000ff, 0x00000000
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test1 add, ".b0", ".w0", 0x00000001, ".w0", 0x000000ff, 0x00000000
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test1 adc, ".b0", ".w0", 0x00000010, ".w0", 0x000000fe, 0x0000000f
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# Test when intermediate sum sets the carry.
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test1 add, ".b0", ".w0", 0x10003100, ".w0", 0x00000000, 0x00000000
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test1 adc, ".b0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000001
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# ***** ADD 8-bit dst, 8-bit src *****
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test1 add, ".b0", ".b0", 0x00000210, ".b0", 0x00000130, 0x00000040
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test1 adc, ".b0", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
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test1 adc, ".b0", ".b0", 0x00000001, ".b0", 0xffffffff, 0x00000000
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test1 adc, ".b0", ".b0", 0x00000010, ".b0", 0xfffffffe, 0x0000000f
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test1 adc, ".b0", ".b0", 0x00000010, ".b0", 0x0000000e, 0x0000001f
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test1 adc, ".b0", ".b0", 0x00000001, ".b0", 0xfff0ffff, 0x00000000
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test1 add, ".b0", ".b0", 0x00000001, ".b0", 0xfff0ffff, 0x00000000
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test1 adc, ".b0", ".b0", 0x00000010, ".b0", 0xfff1fffe, 0x0000000f
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# ***** SUB 32-bit dst, 32-bit src *****
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# {sub, clear borrow}
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test1 sub, " ", " ", 0x00000000, " ", 0x00000000, 0x00000000
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# {sub with borrow=0, clear borrow}
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test1 suc, " ", " ", 0x00000010, " ", 0x00000001, 0x0000000f
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# {sub with borrow=0, set borrow}
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test1 suc, " ", " ", 0x00000008, " ", 0x00000009, 0xffffffff
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# {sub with borrow=1, set borrow}
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test1 suc, " ", " ", 0x00000008, " ", 0x00000009, 0xfffffffe
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# {sub with borrow=1, clear borrow}
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test1 suc, " ", " ", 0x00000008, " ", 0x00000001, 0x00000006
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# {sub with borrow=0, set borrow}
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test1 suc, " ", " ", 0x80000000, " ", 0x90000000, 0xf0000000
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# {sub, set borrow}
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test1 sub, " ", " ", 0x00000000, " ", 0x00000001, 0xffffffff
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# {sub with borrow=1, set borrow}
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test1 suc, " ", " ", 0x80000000, " ", 0x90000000, 0xefffffff
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# ***** SUB 32-bit dst, 16-bit src *****
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test1 sub, " ", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
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test1 suc, " ", ".w0", 0x00000010, ".w0", 0x00000001, 0x0000000f
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test1 suc, " ", ".w0", 0x00000008, ".w0", 0x00000009, 0xffffffff
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test1 suc, " ", ".w0", 0x00000008, ".w0", 0x00000009, 0xfffffffe
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test1 suc, " ", ".w0", 0x00000008, ".w0", 0x00000001, 0x00000006
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test1 suc, " ", ".w0", 0x00108000, ".w0", 0x00009000, 0xfffff000
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test1 sub, " ", ".w0", 0x00000000, ".w0", 0x00000001, 0xffffffff
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test1 suc, " ", ".w0", 0x00008000, ".w0", 0x00009000, 0xffffefff
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# ***** SUB 32-bit dst, 8-bit src *****
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test1 sub, " ", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
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test1 suc, " ", ".b0", 0x00000010, ".b0", 0x00000001, 0x0000000f
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test1 suc, " ", ".b0", 0x00000008, ".b0", 0x00000009, 0xffffffff
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test1 suc, " ", ".b0", 0x00000008, ".b0", 0x00000009, 0xfffffffe
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test1 suc, " ", ".b0", 0x00000008, ".b0", 0x00000001, 0x00000006
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test1 suc, " ", ".b0", 0x00108080, ".b0", 0x00009090, 0xfffffff0
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test1 sub, " ", ".b0", 0x00000000, ".b0", 0x00000001, 0xffffffff
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test1 suc, " ", ".b0", 0x00008080, ".b0", 0x00009090, 0xffffffef
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# ***** SUB 16-bit dst, 32-bit src *****
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test1 sub, ".w0", " ", 0x00000000, " ", 0x00000000, 0x00000000
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test1 suc, ".w0", " ", 0x00000010, " ", 0x00000001, 0x0000000f
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test1 suc, ".w0", " ", 0x00000008, " ", 0x00000009, 0x0000ffff
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test1 suc, ".w0", " ", 0x00000008, " ", 0x00000009, 0x0000fffe
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test1 suc, ".w0", " ", 0x00000008, " ", 0x00000001, 0x00000006
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test1 suc, ".w0", " ", 0x00108000, " ", 0x00009000, 0x0000f000
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test1 sub, ".w0", " ", 0x00000000, " ", 0x00000001, 0x0000ffff
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test1 suc, ".w0", " ", 0x00008000, " ", 0x00009000, 0x0000efff
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# Test when intermediate value sets the borrow.
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test1 sub, ".w0", " ", 0x00010000, " ", 0x00000000, 0x00000000
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test1 suc, ".w0", " ", 0x00000002, " ", 0x00000000, 0x00000001
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# ***** SUB 16-bit dst, 16-bit src *****
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test1 sub, ".w0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
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test1 suc, ".w0", ".w0", 0x00000010, ".w0", 0x00000001, 0x0000000f
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test1 suc, ".w0", ".w0", 0x00000008, ".w0", 0x00000009, 0x0000ffff
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test1 suc, ".w0", ".w0", 0x00000008, ".w0", 0x00000009, 0x0000fffe
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test1 suc, ".w0", ".w0", 0x00000008, ".w0", 0x00000001, 0x00000006
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test1 suc, ".w0", ".w0", 0x00108000, ".w0", 0x00009000, 0x0000f000
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test1 sub, ".w0", ".w0", 0x00000000, ".w0", 0x00000001, 0x0000ffff
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test1 suc, ".w0", ".w0", 0x00008000, ".w0", 0x00009000, 0x0000efff
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# ***** SUB 16-bit dst, 8-bit src *****
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test1 sub, ".w0", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
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test1 suc, ".w0", ".b0", 0x00000010, ".b0", 0x00000001, 0x0000000f
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test1 suc, ".w0", ".b0", 0x00000008, ".b0", 0x00000009, 0x0000ffff
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test1 suc, ".w0", ".b0", 0x00000008, ".b0", 0x00000009, 0x0000fffe
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test1 suc, ".w0", ".b0", 0x00000008, ".b0", 0x00000001, 0x00000006
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test1 suc, ".w0", ".b0", 0x00108080, ".b0", 0x00009090, 0x0000fff0
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test1 sub, ".w0", ".b0", 0x00000000, ".b0", 0x00000001, 0x0000ffff
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test1 suc, ".w0", ".b0", 0x0000a080, ".b0", 0x0000c090, 0x0000ffef
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# ***** SUB 8-bit dst, 32-bit src *****
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test1 sub, ".b0", " ", 0x00000000, " ", 0x00000000, 0x00000000
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test1 suc, ".b0", " ", 0x00000010, " ", 0x00000001, 0x0000000f
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test1 suc, ".b0", " ", 0x00000008, " ", 0x00000009, 0x000000ff
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test1 suc, ".b0", " ", 0x00000008, " ", 0x00000009, 0x000000fe
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test1 suc, ".b0", " ", 0x00000008, " ", 0x00000001, 0x00000006
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test1 suc, ".b0", " ", 0x00000080, " ", 0x00000090, 0x000000f0
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test1 sub, ".b0", " ", 0x00000000, " ", 0x00000001, 0x000000ff
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test1 suc, ".b0", " ", 0x00000080, " ", 0x00000090, 0x000000ef
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# Test when intermediate value sets the borrow.
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test1 sub, ".b0", " ", 0x00000100, " ", 0x00000000, 0x00000000
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test1 suc, ".b0", " ", 0x00000002, " ", 0x00000000, 0x00000001
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test1 sub, ".b0", " ", 0x00000100, " ", 0x00000000, 0x00000000
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test1 rsc, ".b0", " ", 0x00000000, " ", 0x00000002, 0x00000001
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# ***** SUB 8-bit dst, 16-bit src *****
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test1 sub, ".b0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
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test1 suc, ".b0", ".w0", 0x00000010, ".w0", 0x00000001, 0x0000000f
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test1 suc, ".b0", ".w0", 0x00000008, ".w0", 0x00000009, 0x000000ff
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test1 suc, ".b0", ".w0", 0x00000008, ".w0", 0x00000009, 0x000000fe
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test1 suc, ".b0", ".w0", 0x00000008, ".w0", 0x00000001, 0x00000006
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test1 suc, ".b0", ".w0", 0x00000080, ".w0", 0x00000090, 0x000000f0
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test1 sub, ".b0", ".w0", 0x00000000, ".w0", 0x00000001, 0x000000ff
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test1 suc, ".b0", ".w0", 0x00000080, ".w0", 0x00000090, 0x000000ef
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# Test when intermediate value sets the borrow.
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test1 sub, ".b0", ".w0", 0x00000100, ".w0", 0x00000000, 0x00000000
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test1 suc, ".b0", ".w0", 0x00000002, ".w0", 0x00000000, 0x00000001
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test1 sub, ".b0", ".w0", 0x00000100, ".w0", 0x00000000, 0x00000000
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test1 rsc, ".b0", ".w0", 0x00000000, ".w0", 0x00000002, 0x00000001
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# ***** SUB 8-bit dst, 8-bit src *****
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test1 sub, ".b0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
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test1 suc, ".b0", ".w0", 0x00000010, ".w0", 0x00000001, 0x0000000f
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test1 suc, ".b0", ".w0", 0x00000008, ".w0", 0x00000009, 0x000000ff
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test1 suc, ".b0", ".w0", 0x00000008, ".w0", 0x00000009, 0x000000fe
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test1 suc, ".b0", ".w0", 0x00000008, ".w0", 0x00000001, 0x00000006
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test1 suc, ".b0", ".w0", 0x00000080, ".w0", 0x00000090, 0x000000f0
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test1 sub, ".b0", ".w0", 0x00000000, ".w0", 0x00000001, 0x000000ff
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test1 suc, ".b0", ".w0", 0x00000080, ".w0", 0x00000090, 0x000000ef
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# ***** Reverse SUB 32-bit dst, 32-bit src *****
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# {rsb, clear borrow}
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test1 rsb, " ", " ", 0x00000000, " ", 0x00000000, 0x00000000
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# {rsb with borrow=0, clear borrow}
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test1 rsc, " ", " ", 0x00000001, " ", 0x00000010, 0x0000000f
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# {rsb with borrow=0, set borrow}
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test1 rsc, " ", " ", 0x00000009, " ", 0x00000008, 0xffffffff
|
|
# {rsb with borrow=1, set borrow}
|
|
test1 rsc, " ", " ", 0x00000009, " ", 0x00000008, 0xfffffffe
|
|
# {rsb with borrow=1, clear borrow}
|
|
test1 rsc, " ", " ", 0x00000001, " ", 0x00000008, 0x00000006
|
|
# {rsb with borrow=0, set borrow}
|
|
test1 rsc, " ", " ", 0x90000000, " ", 0x80000000, 0xf0000000
|
|
# {rsb, set borrow}
|
|
test1 rsb, " ", " ", 0x00000001, " ", 0x00000000, 0xffffffff
|
|
# {rsb with borrow=1, set borrow}
|
|
test1 rsc, " ", " ", 0x90000000, " ", 0x80000000, 0xefffffff
|
|
|
|
# ***** Reverse SUB 32-bit dst, 16-bit src *****
|
|
test1 rsb, " ", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
|
|
test1 rsc, " ", ".w0", 0x00000001, ".w0", 0x00000010, 0x0000000f
|
|
test1 rsc, " ", ".w0", 0x00000009, ".w0", 0x00000008, 0xffffffff
|
|
test1 rsc, " ", ".w0", 0x00000009, ".w0", 0x00000008, 0xfffffffe
|
|
test1 rsc, " ", ".w0", 0x00000001, ".w0", 0x00000008, 0x00000006
|
|
test1 rsc, " ", ".w0", 0x00109000, ".w0", 0x00008000, 0xfffff000
|
|
test1 rsb, " ", ".w0", 0x00000001, ".w0", 0x00000000, 0xffffffff
|
|
test1 rsc, " ", ".w0", 0x00009000, ".w0", 0x00008000, 0xffffefff
|
|
|
|
# ***** Reverse SUB 32-bit dst, 8-bit src *****
|
|
test1 rsb, " ", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
|
|
test1 rsc, " ", ".b0", 0x00000001, ".b0", 0x00000010, 0x0000000f
|
|
test1 rsc, " ", ".b0", 0x00000009, ".b0", 0x00000008, 0xffffffff
|
|
test1 rsc, " ", ".b0", 0x00000009, ".b0", 0x00000008, 0xfffffffe
|
|
test1 rsc, " ", ".b0", 0x00000001, ".b0", 0x00000008, 0x00000006
|
|
test1 rsc, " ", ".b0", 0x00108090, ".b0", 0x00009080, 0xfffffff0
|
|
test1 rsb, " ", ".b0", 0x00000001, ".b0", 0x00000000, 0xffffffff
|
|
test1 rsc, " ", ".b0", 0x00008090, ".b0", 0x00009080, 0xffffffef
|
|
|
|
# ***** Reverse SUB 16-bit dst, 32-bit src *****
|
|
test1 rsb, ".w0", " ", 0x00000000, " ", 0x00000000, 0x00000000
|
|
test1 rsc, ".w0", " ", 0x00000001, " ", 0x00000010, 0x0000000f
|
|
test1 rsc, ".w0", " ", 0x00000009, " ", 0x00000008, 0x0000ffff
|
|
test1 rsc, ".w0", " ", 0x00000009, " ", 0x00000008, 0x0000fffe
|
|
test1 rsc, ".w0", " ", 0x00000001, " ", 0x00000008, 0x00000006
|
|
test1 rsc, ".w0", " ", 0x00109000, " ", 0x00008000, 0x0000f000
|
|
test1 rsb, ".w0", " ", 0x00000001, " ", 0x00000000, 0x0000ffff
|
|
test1 rsc, ".w0", " ", 0x00009000, " ", 0x00008000, 0x0000efff
|
|
# Test when intermediate value sets the borrow.
|
|
test1 rsb, ".w0", " ", 0x00000000, " ", 0x00010000, 0x00000000
|
|
test1 rsc, ".w0", " ", 0x00000000, " ", 0x00000002, 0x00000001
|
|
|
|
# ***** Reverse SUB 16-bit dst, 16-bit src *****
|
|
test1 rsb, ".w0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
|
|
test1 rsc, ".w0", ".w0", 0x00000001, ".w0", 0x00000010, 0x0000000f
|
|
test1 rsc, ".w0", ".w0", 0x00000009, ".w0", 0x00000008, 0x0000ffff
|
|
test1 rsc, ".w0", ".w0", 0x00000009, ".w0", 0x00000008, 0x0000fffe
|
|
test1 rsc, ".w0", ".w0", 0x00000001, ".w0", 0x00000008, 0x00000006
|
|
test1 rsc, ".w0", ".w0", 0x00109000, ".w0", 0x00008000, 0x0000f000
|
|
test1 rsb, ".w0", ".w0", 0x00000001, ".w0", 0x00000000, 0x0000ffff
|
|
test1 rsc, ".w0", ".w0", 0x00009000, ".w0", 0x00008000, 0x0000efff
|
|
|
|
# ***** Reverse SUB 16-bit dst, 8-bit src *****
|
|
test1 rsb, ".w0", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
|
|
test1 rsc, ".w0", ".b0", 0x00000001, ".b0", 0x00000010, 0x0000000f
|
|
test1 rsc, ".w0", ".b0", 0x00000009, ".b0", 0x00000008, 0x0000ffff
|
|
test1 rsc, ".w0", ".b0", 0x00000009, ".b0", 0x00000008, 0x0000fffe
|
|
test1 rsc, ".w0", ".b0", 0x00000001, ".b0", 0x00000008, 0x00000006
|
|
test1 rsc, ".w0", ".b0", 0x00108090, ".b0", 0x00009080, 0x0000fff0
|
|
test1 rsb, ".w0", ".b0", 0x00000001, ".b0", 0x00000000, 0x0000ffff
|
|
test1 rsc, ".w0", ".b0", 0x0000a090, ".b0", 0x0000c080, 0x0000ffef
|
|
|
|
# ***** Reverse SUB 8-bit dst, 32-bit src *****
|
|
test1 rsb, ".b0", " ", 0x00000000, " ", 0x00000000, 0x00000000
|
|
test1 rsc, ".b0", " ", 0x00000001, " ", 0x00000010, 0x0000000f
|
|
test1 rsc, ".b0", " ", 0x00000009, " ", 0x00000008, 0x000000ff
|
|
test1 rsc, ".b0", " ", 0x00000009, " ", 0x00000008, 0x000000fe
|
|
test1 rsc, ".b0", " ", 0x00000001, " ", 0x00000008, 0x00000006
|
|
test1 rsc, ".b0", " ", 0x00000090, " ", 0x00000080, 0x000000f0
|
|
test1 rsb, ".b0", " ", 0x00000001, " ", 0x00000000, 0x000000ff
|
|
test1 rsc, ".b0", " ", 0x00000090, " ", 0x00000080, 0x000000ef
|
|
# Test when intermediate value sets the borrow.
|
|
test1 rsb, ".b0", " ", 0x00000000, " ", 0x00000100, 0x00000000
|
|
test1 rsc, ".b0", " ", 0x00000000, " ", 0x00000002, 0x00000001
|
|
test1 rsb, ".b0", " ", 0x00000000, " ", 0x00000100, 0x00000000
|
|
test1 suc, ".b0", " ", 0x00000002, " ", 0x00000000, 0x00000001
|
|
|
|
# ***** Reverse SUB 8-bit dst, 16-bit src *****
|
|
test1 rsb, ".b0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
|
|
test1 rsc, ".b0", ".w0", 0x00000001, ".w0", 0x00000010, 0x0000000f
|
|
test1 rsc, ".b0", ".w0", 0x00000009, ".w0", 0x00000008, 0x000000ff
|
|
test1 rsc, ".b0", ".w0", 0x00000009, ".w0", 0x00000008, 0x000000fe
|
|
test1 rsc, ".b0", ".w0", 0x00000001, ".w0", 0x00000008, 0x00000006
|
|
test1 rsc, ".b0", ".w0", 0x00000090, ".w0", 0x00000080, 0x000000f0
|
|
test1 rsb, ".b0", ".w0", 0x00000001, ".w0", 0x00000000, 0x000000ff
|
|
test1 rsc, ".b0", ".w0", 0x00000090, ".w0", 0x00000080, 0x000000ef
|
|
# Test when intermediate value sets the borrow.
|
|
test1 rsb, ".b0", ".w0", 0x00000000, ".w0", 0x00000100, 0x00000000
|
|
test1 rsc, ".b0", ".w0", 0x00000000, ".w0", 0x00000002, 0x00000001
|
|
test1 rsb, ".b0", ".w0", 0x00000000, ".w0", 0x00000100, 0x00000000
|
|
test1 suc, ".b0", ".w0", 0x00000002, ".w0", 0x00000000, 0x00000001
|
|
|
|
# ***** Reverse SUB 8-bit dst, 8-bit src *****
|
|
test1 rsb, ".b0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
|
|
test1 rsc, ".b0", ".w0", 0x00000001, ".w0", 0x00000010, 0x0000000f
|
|
test1 rsc, ".b0", ".w0", 0x00000009, ".w0", 0x00000008, 0x000000ff
|
|
test1 rsc, ".b0", ".w0", 0x00000009, ".w0", 0x00000008, 0x000000fe
|
|
test1 rsc, ".b0", ".w0", 0x00000001, ".w0", 0x00000008, 0x00000006
|
|
test1 rsc, ".b0", ".w0", 0x00000090, ".w0", 0x00000080, 0x000000f0
|
|
test1 rsb, ".b0", ".w0", 0x00000001, ".w0", 0x00000000, 0x000000ff
|
|
test1 rsc, ".b0", ".w0", 0x00000090, ".w0", 0x00000080, 0x000000ef
|
|
|
|
# ***** Mixed 32-bit *****
|
|
test1 sub, " ", " ", 0x00000000, " ", 0x00000000, 0x00000000
|
|
test1 adc, " ", " ", 0x00000000, " ", 0x00000000, 0x00000001
|
|
test1 suc, " ", " ", 0x00000001, " ", 0x00000001, 0xffffffff
|
|
test1 adc, " ", " ", 0x00000001, " ", 0x00000000, 0x00000001
|
|
|
|
test_seq "", "", 0xffffffff, 0x00000001, 0x00000000, 0x00000000 add, suc, add, 0x00000000
|
|
test_seq "", "", 0xffffffff, 0x00000001, 0x00000000, 0x00000000 add, rsc, add, 0x00000000
|
|
test_seq "", "", 0xfffffffe, 0x00000001, 0x00000000, 0x00000000 add, suc, add, 0xfffffffe
|
|
test_seq "", "", 0xffffffff, 0x00000001, 0x00000000, 0x00000000 add, suc, adc, 0x00000001
|
|
test_seq "", "", 0xfffffffe, 0x00000001, 0x00000000, 0x00000000 add, suc, adc, 0xffffffff
|
|
|
|
test_seq "", "", 0xffffffff, 0x00000010, 0x00000000, 0x00000000 sub, adc, add, 0xfffffff0
|
|
test_seq "", "", 0x0fffffff, 0x00000010, 0x00000000, 0x00000000 sub, adc, add, 0x0ffffff0
|
|
test_seq "", "", 0x00000000, 0x00000010, 0x00000000, 0x00000000 sub, adc, add, 0xfffffff0
|
|
test_seq "", "", 0x00000000, 0x00000010, 0x00000000, 0x00000000 sub, adc, adc, 0xfffffff0
|
|
test_seq "", "", 0x00000000, 0x00000010, 0x00000000, 0x00000000 sub, adc, suc, 0xffffffef
|
|
|
|
|
|
# For coverage, also test sequences of ALU instructions
|
|
# (i.e. no other instructions in between).
|
|
test_seq "", "", 0x00000000, 0x00000000, 0x00000000, 0x00000000 add, adc, adc, 0x00000000
|
|
test_seq "", "", 0x80000000, 0xfffffff0, 0xc0000000, 0x0000001a add, adc, adc, 0x4000000c
|
|
test_seq "", ".b0", 0x00000000, 0x00000001, 0x000000ff, 0x00000000 add, adc, adc, 0x00000001
|
|
test_seq "", ".b0", 0x00000000, 0x00000001, 0x000000ff, 0x00000000 add, adc, adc, 0x00000001
|
|
test_seq ".b0", ".b0", 0x00000000, 0x00000001, 0x00000000, 0x0000ffff add, adc, adc, 0x00000000
|
|
test_seq ".b0", ".w0", 0x00000001, 0x00000020, 0x00000400, 0x00008000 add, adc, adc, 0x00000021
|
|
test_seq "", "", 0x00000010, 0x0000000f, 0x00000002, 0x00000020 sub, suc, suc, 0xffffffde
|
|
test_seq "", ".b0", 0x00000202, 0x00000000, 0x00000000, 0x00000000 sub, suc, suc, 0x00000002
|
|
test_seq ".w0", ".b0", 0x00000008, 0x00000000, 0x00000000, 0x00000000, sub, suc, suc, 0x00000008
|
|
test_seq ".w0", ".b0", 0x00000008, 0x000000ff, 0x000000ff, 0x000000ff, sub, suc, suc, 0x00000009
|
|
test_seq ".w0", ".b0", 0x00000008, 0x00000fff, 0x00000fff, 0x00000fff, sub, suc, suc, 0x0000000b
|
|
test_seq "", "", 0x0000000f, 0x00000010, 0x00000002, 0x00000020 rsb, suc, suc, 0xffffffde
|
|
test_seq "", "", 0xffffffff, 0x00000001, 0x00000000, 0x00000000 add, suc, adc, 0x00000001
|
|
test_seq "", "", 0x00000000, 0x00000010, 0x00000000, 0x00000000 sub, adc, adc, 0xfffffff0
|
|
test_seq "", "", 0x00000000, 0x00000010, 0x00000000, 0x00000000 sub, adc, suc, 0xffffffef
|
|
|
|
pass
|
|
EXIT_FAIL:
|
|
fail
|