derek.holloway
7502bf64a4
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841 lines
45 KiB
C
841 lines
45 KiB
C
// This file was automatically generated. Do not edit.
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// We use a special strategy to force the generation of the PTX. This is mainly
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// a fight against dead-code-elimination in the NVVM layer.
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//
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// The reason we need this strategy is because certain older versions of ptxas
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// segfault when a non-sensical sequence of PTX is generated. So instead, we try
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// to force the instantiation and compilation to PTX of all the overloads of the
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// PTX wrapping functions.
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//
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// We do this by writing a function pointer of each overload to the kernel
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// parameter `fn_ptr`.
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//
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// Because `fn_ptr` is possibly visible outside this translation unit, the
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// compiler must compile all the functions which are stored.
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__global__ void test_multimem_red(void** fn_ptr)
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{
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#if __cccl_ptx_isa >= 810
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NV_IF_TARGET(
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NV_PROVIDES_SM_90,
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(
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// multimem.red.relaxed.cta.global.min.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_min_t, uint32_t*, uint32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.relaxed.cluster.global.min.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_min_t, uint32_t*, uint32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.relaxed.gpu.global.min.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_min_t, uint32_t*, uint32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.relaxed.sys.global.min.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_min_t, uint32_t*, uint32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.cta.global.min.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_min_t, uint32_t*, uint32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.cluster.global.min.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_min_t, uint32_t*, uint32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.gpu.global.min.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_min_t, uint32_t*, uint32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.sys.global.min.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_min_t, uint32_t*, uint32_t)>(
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cuda::ptx::multimem_red));));
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#endif // __cccl_ptx_isa >= 810
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#if __cccl_ptx_isa >= 810
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NV_IF_TARGET(
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NV_PROVIDES_SM_90,
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(
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// multimem.red.relaxed.cta.global.min.u64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_min_t, uint64_t*, uint64_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.relaxed.cluster.global.min.u64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_min_t, uint64_t*, uint64_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.relaxed.gpu.global.min.u64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_min_t, uint64_t*, uint64_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.relaxed.sys.global.min.u64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_min_t, uint64_t*, uint64_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.cta.global.min.u64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_min_t, uint64_t*, uint64_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.cluster.global.min.u64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_min_t, uint64_t*, uint64_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.gpu.global.min.u64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_min_t, uint64_t*, uint64_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.sys.global.min.u64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_min_t, uint64_t*, uint64_t)>(
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cuda::ptx::multimem_red));));
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#endif // __cccl_ptx_isa >= 810
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#if __cccl_ptx_isa >= 810
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NV_IF_TARGET(
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NV_PROVIDES_SM_90,
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(
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// multimem.red.relaxed.cta.global.min.s32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_min_t, int32_t*, int32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.relaxed.cluster.global.min.s32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_min_t, int32_t*, int32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.relaxed.gpu.global.min.s32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_min_t, int32_t*, int32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.relaxed.sys.global.min.s32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_min_t, int32_t*, int32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.cta.global.min.s32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_min_t, int32_t*, int32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.cluster.global.min.s32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_min_t, int32_t*, int32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.gpu.global.min.s32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_min_t, int32_t*, int32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.sys.global.min.s32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_min_t, int32_t*, int32_t)>(
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cuda::ptx::multimem_red));));
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#endif // __cccl_ptx_isa >= 810
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#if __cccl_ptx_isa >= 810
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NV_IF_TARGET(
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NV_PROVIDES_SM_90,
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(
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// multimem.red.relaxed.cta.global.min.s64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_min_t, int64_t*, int64_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.relaxed.cluster.global.min.s64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_min_t, int64_t*, int64_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.relaxed.gpu.global.min.s64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_min_t, int64_t*, int64_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.relaxed.sys.global.min.s64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_min_t, int64_t*, int64_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.cta.global.min.s64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_min_t, int64_t*, int64_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.cluster.global.min.s64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_min_t, int64_t*, int64_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.gpu.global.min.s64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_min_t, int64_t*, int64_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.sys.global.min.s64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_min_t, int64_t*, int64_t)>(
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cuda::ptx::multimem_red));));
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#endif // __cccl_ptx_isa >= 810
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#if __cccl_ptx_isa >= 810
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NV_IF_TARGET(
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NV_PROVIDES_SM_90,
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(
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// multimem.red.relaxed.cta.global.max.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_max_t, uint32_t*, uint32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.relaxed.cluster.global.max.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_max_t, uint32_t*, uint32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.relaxed.gpu.global.max.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_max_t, uint32_t*, uint32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.relaxed.sys.global.max.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_max_t, uint32_t*, uint32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.cta.global.max.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_max_t, uint32_t*, uint32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.cluster.global.max.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_max_t, uint32_t*, uint32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.gpu.global.max.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_max_t, uint32_t*, uint32_t)>(
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cuda::ptx::multimem_red));
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// multimem.red.release.sys.global.max.u32 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_max_t, uint32_t*, uint32_t)>(
|
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cuda::ptx::multimem_red));));
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#endif // __cccl_ptx_isa >= 810
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#if __cccl_ptx_isa >= 810
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NV_IF_TARGET(
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NV_PROVIDES_SM_90,
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(
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// multimem.red.relaxed.cta.global.max.u64 [addr], val;
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* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_max_t, uint64_t*, uint64_t)>(
|
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cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.cluster.global.max.u64 [addr], val;
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|
* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_max_t, uint64_t*, uint64_t)>(
|
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cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.gpu.global.max.u64 [addr], val;
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|
* fn_ptr++ = reinterpret_cast<void*>(
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static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_max_t, uint64_t*, uint64_t)>(
|
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cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.sys.global.max.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
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cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_max_t, uint64_t*, uint64_t)>(
|
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cuda::ptx::multimem_red));
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|
// multimem.red.release.cta.global.max.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
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cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_max_t, uint64_t*, uint64_t)>(
|
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cuda::ptx::multimem_red));
|
|
// multimem.red.release.cluster.global.max.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
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cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_max_t, uint64_t*, uint64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.gpu.global.max.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_max_t, uint64_t*, uint64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.sys.global.max.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_max_t, uint64_t*, uint64_t)>(
|
|
cuda::ptx::multimem_red));));
|
|
#endif // __cccl_ptx_isa >= 810
|
|
|
|
#if __cccl_ptx_isa >= 810
|
|
NV_IF_TARGET(
|
|
NV_PROVIDES_SM_90,
|
|
(
|
|
// multimem.red.relaxed.cta.global.max.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_max_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.cluster.global.max.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_max_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.gpu.global.max.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_max_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.sys.global.max.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_max_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cta.global.max.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_max_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cluster.global.max.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_max_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.gpu.global.max.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_max_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.sys.global.max.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_max_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));));
|
|
#endif // __cccl_ptx_isa >= 810
|
|
|
|
#if __cccl_ptx_isa >= 810
|
|
NV_IF_TARGET(
|
|
NV_PROVIDES_SM_90,
|
|
(
|
|
// multimem.red.relaxed.cta.global.max.s64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_max_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.cluster.global.max.s64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_max_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.gpu.global.max.s64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_max_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.sys.global.max.s64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_max_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cta.global.max.s64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_max_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cluster.global.max.s64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_max_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.gpu.global.max.s64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_max_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.sys.global.max.s64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_max_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));));
|
|
#endif // __cccl_ptx_isa >= 810
|
|
|
|
#if __cccl_ptx_isa >= 810
|
|
NV_IF_TARGET(
|
|
NV_PROVIDES_SM_90,
|
|
(
|
|
// multimem.red.relaxed.cta.global.add.u32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_add_t, uint32_t*, uint32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.cluster.global.add.u32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_add_t, uint32_t*, uint32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.gpu.global.add.u32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_add_t, uint32_t*, uint32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.sys.global.add.u32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_add_t, uint32_t*, uint32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cta.global.add.u32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_add_t, uint32_t*, uint32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cluster.global.add.u32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_add_t, uint32_t*, uint32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.gpu.global.add.u32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_add_t, uint32_t*, uint32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.sys.global.add.u32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_add_t, uint32_t*, uint32_t)>(
|
|
cuda::ptx::multimem_red));));
|
|
#endif // __cccl_ptx_isa >= 810
|
|
|
|
#if __cccl_ptx_isa >= 810
|
|
NV_IF_TARGET(
|
|
NV_PROVIDES_SM_90,
|
|
(
|
|
// multimem.red.relaxed.cta.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_add_t, uint64_t*, uint64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.cluster.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_add_t, uint64_t*, uint64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.gpu.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_add_t, uint64_t*, uint64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.sys.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_add_t, uint64_t*, uint64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cta.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_add_t, uint64_t*, uint64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cluster.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_add_t, uint64_t*, uint64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.gpu.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_add_t, uint64_t*, uint64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.sys.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_add_t, uint64_t*, uint64_t)>(
|
|
cuda::ptx::multimem_red));));
|
|
#endif // __cccl_ptx_isa >= 810
|
|
|
|
#if __cccl_ptx_isa >= 810
|
|
NV_IF_TARGET(
|
|
NV_PROVIDES_SM_90,
|
|
(
|
|
// multimem.red.relaxed.cta.global.add.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_add_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.cluster.global.add.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_add_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.gpu.global.add.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_add_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.sys.global.add.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_add_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cta.global.add.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_add_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cluster.global.add.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_add_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.gpu.global.add.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_add_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.sys.global.add.s32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_add_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));));
|
|
#endif // __cccl_ptx_isa >= 810
|
|
|
|
#if __cccl_ptx_isa >= 810
|
|
NV_IF_TARGET(
|
|
NV_PROVIDES_SM_90,
|
|
(
|
|
// multimem.red.relaxed.cta.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_add_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.cluster.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_add_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.gpu.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_add_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.sys.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_add_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cta.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_add_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cluster.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_add_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.gpu.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_add_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.sys.global.add.u64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_add_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));));
|
|
#endif // __cccl_ptx_isa >= 810
|
|
|
|
#if __cccl_ptx_isa >= 810
|
|
NV_IF_TARGET(
|
|
NV_PROVIDES_SM_90,
|
|
(
|
|
// multimem.red.relaxed.cta.global.and.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_and_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.cluster.global.and.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_and_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.gpu.global.and.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_and_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.sys.global.and.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_and_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cta.global.and.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_and_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cluster.global.and.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_and_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.gpu.global.and.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_and_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.sys.global.and.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_and_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));));
|
|
#endif // __cccl_ptx_isa >= 810
|
|
|
|
#if __cccl_ptx_isa >= 810
|
|
NV_IF_TARGET(
|
|
NV_PROVIDES_SM_90,
|
|
(
|
|
// multimem.red.relaxed.cta.global.or.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_or_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.cluster.global.or.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_or_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.gpu.global.or.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_or_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.sys.global.or.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_or_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cta.global.or.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_or_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cluster.global.or.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_or_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.gpu.global.or.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_or_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.sys.global.or.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_or_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));));
|
|
#endif // __cccl_ptx_isa >= 810
|
|
|
|
#if __cccl_ptx_isa >= 810
|
|
NV_IF_TARGET(
|
|
NV_PROVIDES_SM_90,
|
|
(
|
|
// multimem.red.relaxed.cta.global.xor.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_xor_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.cluster.global.xor.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_xor_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.gpu.global.xor.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_xor_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.sys.global.xor.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_xor_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cta.global.xor.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_xor_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cluster.global.xor.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_xor_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.gpu.global.xor.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_xor_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.sys.global.xor.b32 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_xor_op_t, int32_t*, int32_t)>(
|
|
cuda::ptx::multimem_red));));
|
|
#endif // __cccl_ptx_isa >= 810
|
|
|
|
#if __cccl_ptx_isa >= 810
|
|
NV_IF_TARGET(
|
|
NV_PROVIDES_SM_90,
|
|
(
|
|
// multimem.red.relaxed.cta.global.and.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_and_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.cluster.global.and.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_and_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.gpu.global.and.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_and_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.sys.global.and.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_and_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cta.global.and.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_and_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cluster.global.and.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_and_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.gpu.global.and.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_and_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.sys.global.and.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_and_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));));
|
|
#endif // __cccl_ptx_isa >= 810
|
|
|
|
#if __cccl_ptx_isa >= 810
|
|
NV_IF_TARGET(
|
|
NV_PROVIDES_SM_90,
|
|
(
|
|
// multimem.red.relaxed.cta.global.or.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_or_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.cluster.global.or.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_or_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.gpu.global.or.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_or_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.sys.global.or.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_or_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cta.global.or.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_or_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cluster.global.or.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_or_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.gpu.global.or.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_or_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.sys.global.or.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_or_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));));
|
|
#endif // __cccl_ptx_isa >= 810
|
|
|
|
#if __cccl_ptx_isa >= 810
|
|
NV_IF_TARGET(
|
|
NV_PROVIDES_SM_90,
|
|
(
|
|
// multimem.red.relaxed.cta.global.xor.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cta_t, cuda::ptx::op_xor_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.cluster.global.xor.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_xor_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.gpu.global.xor.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_xor_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.relaxed.sys.global.xor.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_relaxed_t, cuda::ptx::scope_sys_t, cuda::ptx::op_xor_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cta.global.xor.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cta_t, cuda::ptx::op_xor_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.cluster.global.xor.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_cluster_t, cuda::ptx::op_xor_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.gpu.global.xor.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_gpu_t, cuda::ptx::op_xor_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));
|
|
// multimem.red.release.sys.global.xor.b64 [addr], val;
|
|
* fn_ptr++ = reinterpret_cast<void*>(
|
|
static_cast<void (*)(
|
|
cuda::ptx::sem_release_t, cuda::ptx::scope_sys_t, cuda::ptx::op_xor_op_t, int64_t*, int64_t)>(
|
|
cuda::ptx::multimem_red));));
|
|
#endif // __cccl_ptx_isa >= 810
|
|
}
|