TheRock/rocm-libraries/projects/hipblaslt/tensilelite/Tensile/Components/MAC_I8X4.py

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from rocisa.code import Module
from rocisa.enum import DataTypeEnum
from ..Common.DataType import DataType
from ..Component import Component, MAC

class MAC_I8X4_Plain(MAC):
    asmCaps = {"VOP3v_dot4_i32_i8": True}
    kernel = {"ProblemType": {"DataType": DataType(DataTypeEnum.Int8x4)}}

    def __call__(self, writer, m, innerUnroll):
        kernel = writer.states.kernel
        module = Module("MAC_I8X4_Plain")
        module.addComment(self.commentHeader())
        priority = Component.Priority.find(writer)

        vars = {}
        vars["m"] = m
        vars["ThreadTile0"] = kernel["ThreadTile0"]

        for b in range(0, kernel["ThreadTile1"]):
            vars["b"] = b
            for a in range(0, kernel["ThreadTile0"]):
                vars["a"] = a
                for iui in range(0, innerUnroll):
                    vars["iui"]  = iui
                    cidx         = a + b*kernel["ThreadTile0"] + 0
                    cStr         = "v[vgprValuC+{a}+{b}*{ThreadTile0}]".format_map(vars)
                    aStr         = "v[vgprValuA_X{m}_I{iui}+{a}]".format_map(vars)
                    bStr         = "v[vgprValuB_X{m}_I{iui}+{b}]".format_map(vars)
                    module.addInst("v_dot4_i32_i8", cStr, aStr, bStr, cStr, "valuC[%u]" % cidx)
                    module.add(priority(writer, 1, "Raise priority while processing macs"))

        module.add(priority(writer, 0, "Reset priority after macs"))
        return module