TheRock/rocm-libraries/projects/hipblaslt/tensilelite/Tensile/Components/MAC_I8_HPA.py

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from rocisa.code import Module
from rocisa.enum import DataTypeEnum
from ..Common.DataType import DataType
from ..Component import Component, MAC

class FMA_I8_HPA(MAC):
    @staticmethod
    def asmCaps(caps):
        return True

    kernel = {
        "ProblemType": {"MacDataTypeA": DataType(DataTypeEnum.Int8),
                        "MacDataTypeB": DataType(DataTypeEnum.Int8),
                        "HighPrecisionAccumulate": True},
    }

    def __call__(self, writer, m, innerUnroll):
        kernel      = writer.states.kernel
        priority    = Component.Priority.find(writer)
        spacePerReg = writer.states.bpr
        elemPerReg  = min(kernel['VectorWidth'], spacePerReg)

        module = Module("FMA_I8_HPA")
        module.addComment(self.commentHeader())

        for a in range(kernel["ThreadTile0"]-1, -1, -1):
            for iui in range(0, innerUnroll):
                src  = a // elemPerReg
                idx  = a %  elemPerReg
                sStr = f'v[vgprValuA_X{m}_I{iui}+{src}]'
                tStr = f'v[vgprValuA_X{m}_I{iui}+{a}]'
                module.addInst("v_lshlrev_b32", tStr, {(spacePerReg-idx-1)*8}, sStr, "")
                module.add(priority(writer, 1, "Raise priority while processing macs"))
                module.addInst("v_ashrrev_i32", tStr, {(spacePerReg    -1)*8}, tStr, "")

        for b in range(kernel["ThreadTile1"]-1, -1, -1):
            for iui in range(0, innerUnroll):
                src  = b // elemPerReg
                idx  = b %  elemPerReg
                sStr = f'v[vgprValuB_X{m}_I{iui}+{src}]'
                tStr = f'v[vgprValuB_X{m}_I{iui}+{b}]'
                module.addInst("v_lshlrev_b32", tStr, {(spacePerReg-idx-1)*8}, sStr, "")
                module.add(priority(writer, 1, "Raise priority while processing macs"))
                module.addInst("v_ashrrev_i32", tStr, {(spacePerReg    -1)*8}, tStr, "")

        ThreadTile0 = kernel["ThreadTile0"]
        for b in range(0, kernel["ThreadTile1"]):
            for a in range(0, kernel["ThreadTile0"]):
                for iui in range(0, innerUnroll):
                    cStr = f'v[vgprValuC + {a} + {b}*{ThreadTile0}]'
                    aStr = f'v[vgprValuA_X{m}_I{iui} + {a}]'
                    bStr = f'v[vgprValuB_X{m}_I{iui} + {b}]'
                    module.addInst("v_mad_i32_i24", cStr, aStr, bStr, cStr, "")
                    module.add(priority(writer, 1, "Raise priority while processing macs"))

        module.add(priority(writer, 0, "Reset priority after macs"))

        return module