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96 lines
3.5 KiB
Python
96 lines
3.5 KiB
Python
################################################################################
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#
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# Copyright (C) 2026 Advanced Micro Devices, Inc. All rights reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
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# of this software and associated documentation files (the "Software"), to deal
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# in the Software without restriction, including without limitation the rights
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# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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# copies of the Software, and to permit persons to whom the Software is
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# furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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# THE SOFTWARE.
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#
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################################################################################
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"""Decode Tensile NonTemporal-related parameters into rocisa modifiers."""
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from rocisa.enum import CacheScope, NonVolatile, TemporalHint
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def _has_temporal_hint(asm_caps):
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return bool(asm_caps.get("HasTHModifier", False)) if asm_caps else False
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def decodeNonTemporal(
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asm_caps,
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nt_value,
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temporal_hint=TemporalHint.TH_RT,
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non_volatile=NonVolatile.NV_NONE,
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):
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"""Return ``(glc, slc, nt, scope, th, nv)`` for one memory op.
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Legacy arches keep Tensile's existing 3-bit behavior: bit0 -> glc/sc0,
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bit1 -> slc/sc1, bit2 -> nt. On gfx1250, rocisa exposes ``th:`` and
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``scope:`` instead, so the old sc bits become the gfx1250 scope selection
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(CU/SE/DEV/SYS) and TemporalHint selects the TH field directly. Helpers
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return ``TemporalHint.TH_NONE`` when no rocISA ``th:`` modifier should be
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emitted.
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"""
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if not _has_temporal_hint(asm_caps):
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return (
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bool(nt_value & 0x1),
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bool(nt_value & 0x2),
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bool(nt_value & 0x4),
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CacheScope.SCOPE_NONE,
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TemporalHint.TH_NONE,
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NonVolatile.NV_NONE,
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)
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scope = (
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CacheScope.SCOPE_CU,
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CacheScope.SCOPE_SE,
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CacheScope.SCOPE_DEV,
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CacheScope.SCOPE_SYS,
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)[nt_value & 0x3]
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return (False, False, False, scope, temporal_hint, non_volatile)
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def _at_least_device_scope(scope):
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if scope in (CacheScope.SCOPE_NONE, CacheScope.SCOPE_CU, CacheScope.SCOPE_SE):
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return CacheScope.SCOPE_DEV
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return scope
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def forceCoherentNonTemporal(
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asm_caps,
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nt=False,
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temporal_hint=TemporalHint.TH_RT,
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non_volatile=NonVolatile.NV_NONE,
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scope=CacheScope.SCOPE_DEV,
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):
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"""Return modifiers for store paths that require device coherence.
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Legacy callers used this by forcing glc/sc0 and slc/sc1, while keeping the
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explicit NonTemporal nt bit independent. On gfx1250, preserve any stronger
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caller-selected scope but promote weaker scopes to device scope.
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"""
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if _has_temporal_hint(asm_caps):
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return (
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False,
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False,
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False,
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_at_least_device_scope(scope),
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temporal_hint,
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non_volatile,
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)
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return (True, True, bool(nt), CacheScope.SCOPE_NONE, TemporalHint.TH_NONE, NonVolatile.NV_NONE)
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