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1395 lines
33 KiB
Python
1395 lines
33 KiB
Python
# ##########################################################################
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# Copyright (C) 2022 Advanced Micro Devices, Inc. All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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#
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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# SUCH DAMAGE.
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# ##########################################################################
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import collections
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import os
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import re
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import shlex
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import unittest
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from subprocess import Popen, PIPE
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def call_rocsolver_bench(*args):
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cmd = ['./rocsolver-bench']
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for arg in args:
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if isinstance(arg, str):
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cmd.extend(shlex.split(arg, False, False))
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elif isinstance(arg, collections.Sequence):
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cmd.extend(arg)
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else:
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cmd.push(str(arg))
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process = Popen(cmd, stdout=PIPE, stderr=PIPE)
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stdout, stderr = process.communicate()
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return (str(stdout, encoding='utf-8', errors='surrogateescape'),
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str(stderr, encoding='utf-8', errors='surrogateescape'),
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process.returncode)
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class TestRocsolverBench(unittest.TestCase):
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def parse_arguments(self, bench_output):
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m = re.search(r"\n=+\nArguments:\s*\n=+\n(?P<arg_names>.*)\n(?P<arg_values>.*)\n",
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bench_output, re.MULTILINE)
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self.assertTrue(m)
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arg_names = m.group('arg_names').split()
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arg_values = m.group('arg_values').split()
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self.assertEqual(len(arg_names), len(arg_values))
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return dict(zip(arg_names, arg_values))
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def parse_results(self, bench_output):
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m = re.search(r"\n=+\nResults:\s*\n=+\n(?P<arg_names>.*)\n(?P<arg_values>.*)\n",
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bench_output, re.MULTILINE)
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self.assertTrue(m)
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arg_names = m.group('arg_names').split()
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arg_values = m.group('arg_values').split()
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self.assertEqual(len(arg_names), len(arg_values))
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return dict(zip(arg_names, arg_values))
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def test_help(self):
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out, err, exitcode = call_rocsolver_bench('--help')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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self.assertNotEqual(out, '')
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def test_validate_precision(self):
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for precision in 'sdcz':
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with self.subTest(precision=precision):
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out, err, exitcode = call_rocsolver_bench(f'-f gels -r {precision} -n 10 -m 15')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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out, err, exitcode = call_rocsolver_bench('-f gels -r 0 -n 10 -m 15')
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self.assertNotEqual(err, '')
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self.assertNotEqual(exitcode, 0)
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def test_validate_operation(self):
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for trans in 'NTC':
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with self.subTest(trans=trans):
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out, err, exitcode = call_rocsolver_bench(f'-f gels --trans {trans} -n 10 -m 15')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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out, err, exitcode = call_rocsolver_bench('-f gels --trans 0 -n 10 -m 15')
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self.assertNotEqual(err, '')
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self.assertNotEqual(exitcode, 0)
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def test_validate_side(self):
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for side in 'LRB':
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with self.subTest(side=side):
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out, err, exitcode = call_rocsolver_bench(f'-f larf --side {side} -n 10 -m 15')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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out, err, exitcode = call_rocsolver_bench('-f larf --side 0 -n 10 -m 15')
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self.assertNotEqual(err, '')
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self.assertNotEqual(exitcode, 0)
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def test_validate_fill(self):
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for fill in 'ULF':
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with self.subTest(fill=fill):
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out, err, exitcode = call_rocsolver_bench(f'-f bdsqr --uplo {fill} -n 15 --nu 10 --nv 10')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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out, err, exitcode = call_rocsolver_bench('-f bdsqr --uplo 0 -n 15 --nu 10 --nv 10')
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self.assertNotEqual(err, '')
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self.assertNotEqual(exitcode, 0)
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def test_validate_diagonal(self):
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for diag in 'NU':
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with self.subTest(diag=diag):
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out, err, exitcode = call_rocsolver_bench(f'-f trtri --diag {diag} -n 10')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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out, err, exitcode = call_rocsolver_bench('-f trtri --diag 0 -n 10')
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self.assertNotEqual(err, '')
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self.assertNotEqual(exitcode, 0)
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def test_validate_direct(self):
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for direct in 'FB':
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with self.subTest(direct=direct):
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out, err, exitcode = call_rocsolver_bench(f'-f larfb --direct {direct} --side L --storev C -n 10 -m 15 -k 1')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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out, err, exitcode = call_rocsolver_bench('-f larfb --direct 0 --side L --storev C -k 1 -n 10 -m 15 -k 1')
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self.assertNotEqual(err, '')
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self.assertNotEqual(exitcode, 0)
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def test_validate_storev(self):
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for storev in 'CR':
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with self.subTest(storev=storev):
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out, err, exitcode = call_rocsolver_bench(f'-f larft --storev {storev} -n 10 -k 1')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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out, err, exitcode = call_rocsolver_bench('-f larft --storev 0 -n 10 -k 1')
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self.assertNotEqual(err, '')
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self.assertNotEqual(exitcode, 0)
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def test_validate_left_svect(self):
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for svect in 'ASON':
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with self.subTest(svect=svect):
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out, err, exitcode = call_rocsolver_bench(f'-f gesvd --left_svect {svect} -n 10 -m 15')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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out, err, exitcode = call_rocsolver_bench('-f gesvd --left_svect 0 -n 10 -m 15')
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self.assertNotEqual(err, '')
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self.assertNotEqual(exitcode, 0)
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def test_validate_right_svect(self):
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for svect in 'ASON':
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with self.subTest(svect=svect):
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out, err, exitcode = call_rocsolver_bench(f'-f gesvd --right_svect {svect} -n 10 -m 15')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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out, err, exitcode = call_rocsolver_bench('-f gesvd --right_svect 0 -n 10 -m 15')
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self.assertNotEqual(err, '')
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self.assertNotEqual(exitcode, 0)
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def test_validate_workmode(self):
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for workmode in 'IO':
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with self.subTest(workmode=workmode):
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out, err, exitcode = call_rocsolver_bench(f'-f gesvd --fast_alg {workmode} -n 10 -m 15')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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out, err, exitcode = call_rocsolver_bench('-f gesvd --fast_alg 0 -n 10 -m 15')
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self.assertNotEqual(err, '')
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self.assertNotEqual(exitcode, 0)
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def test_validate_evect(self):
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for evect in 'VIN':
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with self.subTest(evect=evect):
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out, err, exitcode = call_rocsolver_bench(f'-f syev --evect {evect} -n 10')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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out, err, exitcode = call_rocsolver_bench('-f syev --evect 0 -n 10')
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self.assertNotEqual(err, '')
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self.assertNotEqual(exitcode, 0)
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def test_validate_erange(self):
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for erange in 'AVI':
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with self.subTest(erange=erange):
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out, err, exitcode = call_rocsolver_bench(f'-f stebz --erange {erange} -n 10')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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out, err, exitcode = call_rocsolver_bench('-f stebz --erange 0 -n 10')
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self.assertNotEqual(err, '')
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self.assertNotEqual(exitcode, 0)
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def test_validate_eorder(self):
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for eorder in 'BE':
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with self.subTest(eorder=eorder):
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out, err, exitcode = call_rocsolver_bench(f'-f stebz --eorder {eorder} -n 10')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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out, err, exitcode = call_rocsolver_bench('-f stebz --eorder 0 -n 10')
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self.assertNotEqual(err, '')
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self.assertNotEqual(exitcode, 0)
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def test_validate_itype(self):
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for itype in '123':
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with self.subTest(itype=itype):
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out, err, exitcode = call_rocsolver_bench(f'-f sygv --itype {itype} -n 10')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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out, err, exitcode = call_rocsolver_bench('-f sygv --itype 0 -n 10')
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self.assertNotEqual(err, '')
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self.assertNotEqual(exitcode, 0)
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def test_unused_arg(self):
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out, err, exitcode = call_rocsolver_bench('-f gels --itype 1 -n 10 -m 15')
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self.assertNotEqual(err, '')
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self.assertNotEqual(exitcode, 0)
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def test_perf_returns_number(self):
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out, err, exitcode = call_rocsolver_bench('-f gels -n 10 -m 15 --perf 1')
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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self.assertGreaterEqual(float(out), 0)
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def generate_parameterized_test(command_options, expected_args):
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def test_function_output(self):
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out, err, exitcode = call_rocsolver_bench(command_options)
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self.assertEqual(err, '')
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self.assertEqual(exitcode, 0)
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args = self.parse_arguments(out)
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self.assertEqual(args, expected_args)
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results = self.parse_results(out)
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self.assertGreaterEqual(float(results['cpu_time_us']), 0)
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self.assertGreaterEqual(float(results['gpu_time_us']), 0)
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return test_function_output
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parameters = [
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(
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'laswp',
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'-f laswp -n 10 --k1 15 --k2 20',
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{
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'n': '10',
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'lda': '20',
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'k1': '15',
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'k2': '20',
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'inc': '1',
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}
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),
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(
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'larfg',
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'-f larfg -n 10',
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{
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'n': '10',
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'inc': '1',
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}
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),
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(
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'larf',
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'-f larf -m 10 --side L',
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{
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'side': 'L',
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'm': '10',
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'n': '10',
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'inc': '1',
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'lda': '10',
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}
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),
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(
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'larft',
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'-f larft -n 10 --storev C -k 5',
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{
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'direct': 'F',
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'storev': 'C',
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'n': '10',
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'k': '5',
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'ldv': '10',
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'ldt': '5',
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}
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),
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(
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'larfb',
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'-f larfb -n 10 -m 15 --direct F --side L --storev C -k 5',
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{
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'side': 'L',
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'trans': 'N',
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'direct': 'F',
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'storev': 'C',
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'm': '15',
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'n': '10',
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'k': '5',
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'ldv': '15',
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'ldt': '5',
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'lda': '15',
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}
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),
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(
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'latrd',
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'-f latrd -n 10 -k 5',
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{
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'uplo': 'U',
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'n': '10',
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'k': '5',
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'lda': '10',
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'ldw': '10',
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}
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),
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(
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'labrd',
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'-f labrd -n 10 -m 15',
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{
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'm': '15',
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'n': '10',
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'nb': '10',
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'lda': '15',
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'ldx': '15',
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'ldy': '10',
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}
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),
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|
(
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'bdsqr',
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'-f bdsqr --uplo U -n 15 --nu 10 --nv 10',
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{
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'uplo': 'U',
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'n': '15',
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'nv': '10',
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'nu': '10',
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'nc': '0',
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'ldv': '15',
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'ldu': '10',
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'ldc': '1',
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}
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),
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(
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'steqr',
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'-f steqr -n 15',
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{
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'evect': 'N',
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'n': '15',
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'ldc': '15',
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}
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),
|
|
(
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'stedc',
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'-f stedc -n 15',
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{
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'evect': 'N',
|
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'n': '15',
|
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'ldc': '15',
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}
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),
|
|
(
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'stein',
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'-f stein -n 15',
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{
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'n': '15',
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'nev': '5',
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'ldz': '15',
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|
}
|
|
),
|
|
(
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|
'lasyf',
|
|
'-f lasyf -n 10',
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{
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'uplo': 'U',
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|
'n': '10',
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|
'nb': '10',
|
|
'lda': '10',
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|
}
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|
),
|
|
(
|
|
'potf2',
|
|
'-f potf2 -n 10',
|
|
{
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|
'uplo': 'U',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
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|
),
|
|
(
|
|
'potf2_batched',
|
|
'-f potf2_batched -n 10',
|
|
{
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|
'uplo': 'U',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'potf2_strided_batched',
|
|
'-f potf2_strided_batched -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'potrf',
|
|
'-f potrf -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'potrf_batched',
|
|
'-f potrf_batched -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'potrf_strided_batched',
|
|
'-f potrf_strided_batched -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'potrs',
|
|
'-f potrs -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'nrhs': '10',
|
|
'lda': '10',
|
|
'ldb': '10',
|
|
}
|
|
),
|
|
(
|
|
'potrs_batched',
|
|
'-f potrs_batched -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'nrhs': '10',
|
|
'lda': '10',
|
|
'ldb': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'potrs_strided_batched',
|
|
'-f potrs_strided_batched -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'nrhs': '10',
|
|
'lda': '10',
|
|
'ldb': '10',
|
|
'strideA': '100',
|
|
'strideB': '100',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'posv',
|
|
'-f posv -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'nrhs': '10',
|
|
'lda': '10',
|
|
'ldb': '10',
|
|
}
|
|
),
|
|
(
|
|
'posv_batched',
|
|
'-f posv_batched -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'nrhs': '10',
|
|
'lda': '10',
|
|
'ldb': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'posv_strided_batched',
|
|
'-f posv_strided_batched -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'nrhs': '10',
|
|
'lda': '10',
|
|
'ldb': '10',
|
|
'strideA': '100',
|
|
'strideB': '100',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'potri',
|
|
'-f potri -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'potri_batched',
|
|
'-f potri_batched -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'potri_strided_batched',
|
|
'-f potri_strided_batched -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getf2_npvt',
|
|
'-f getf2_npvt -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'getf2_npvt_batched',
|
|
'-f getf2_npvt_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getf2_npvt_strided_batched',
|
|
'-f getf2_npvt_strided_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getrf_npvt',
|
|
'-f getrf_npvt -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'getrf_npvt_batched',
|
|
'-f getrf_npvt_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getrf_npvt_strided_batched',
|
|
'-f getrf_npvt_strided_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getrf',
|
|
'-f getrf -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'getrf_batched',
|
|
'-f getrf_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getrf_strided_batched',
|
|
'-f getrf_strided_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getf2',
|
|
'-f getf2 -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'getf2_batched',
|
|
'-f getf2_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getf2_strided_batched',
|
|
'-f getf2_strided_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'geqr2',
|
|
'-f geqr2 -n 10 -m 15',
|
|
{
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
}
|
|
),
|
|
(
|
|
'geqr2_batched',
|
|
'-f geqr2_batched -n 10 -m 15',
|
|
{
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'geqr2_strided_batched',
|
|
'-f geqr2_strided_batched -n 10 -m 15',
|
|
{
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
'strideA': '150',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'geqrf',
|
|
'-f geqrf -n 10 -m 15',
|
|
{
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
}
|
|
),
|
|
(
|
|
'geqrf_batched',
|
|
'-f geqrf_batched -n 10 -m 15',
|
|
{
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'geqrf_strided_batched',
|
|
'-f geqrf_strided_batched -n 10 -m 15',
|
|
{
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
'strideA': '150',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'geqrf_ptr_batched',
|
|
'-f geqrf_ptr_batched -n 10 -m 15',
|
|
{
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gerq2',
|
|
'-f gerq2 -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'gerq2_batched',
|
|
'-f gerq2_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gerq2_strided_batched',
|
|
'-f gerq2_strided_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gerqf',
|
|
'-f gerqf -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'gerqf_batched',
|
|
'-f gerqf_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gerqf_strided_batched',
|
|
'-f gerqf_strided_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'geql2',
|
|
'-f geql2 -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'geql2_batched',
|
|
'-f geql2_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'geql2_strided_batched',
|
|
'-f geql2_strided_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'geqlf',
|
|
'-f geqlf -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'geqlf_batched',
|
|
'-f geqlf_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'geqlf_strided_batched',
|
|
'-f geqlf_strided_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gelq2',
|
|
'-f gelq2 -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'gelq2_batched',
|
|
'-f gelq2_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gelq2_strided_batched',
|
|
'-f gelq2_strided_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gelqf',
|
|
'-f gelqf -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'gelqf_batched',
|
|
'-f gelqf_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gelqf_strided_batched',
|
|
'-f gelqf_strided_batched -m 10',
|
|
{
|
|
'm': '10',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getrs',
|
|
'-f getrs -n 10',
|
|
{
|
|
'trans': 'N',
|
|
'n': '10',
|
|
'nrhs': '10',
|
|
'lda': '10',
|
|
'ldb': '10',
|
|
}
|
|
),
|
|
(
|
|
'getrs_batched',
|
|
'-f getrs_batched -n 10',
|
|
{
|
|
'trans': 'N',
|
|
'n': '10',
|
|
'nrhs': '10',
|
|
'lda': '10',
|
|
'ldb': '10',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getrs_strided_batched',
|
|
'-f getrs_strided_batched -n 10',
|
|
{
|
|
'trans': 'N',
|
|
'n': '10',
|
|
'nrhs': '10',
|
|
'lda': '10',
|
|
'ldb': '10',
|
|
'strideA': '100',
|
|
'strideP': '10',
|
|
'strideB': '100',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gesv',
|
|
'-f gesv -n 10',
|
|
{
|
|
'n': '10',
|
|
'nrhs': '10',
|
|
'lda': '10',
|
|
'ldb': '10',
|
|
}
|
|
),
|
|
(
|
|
'gesv_batched',
|
|
'-f gesv_batched -n 10',
|
|
{
|
|
'n': '10',
|
|
'nrhs': '10',
|
|
'lda': '10',
|
|
'ldb': '10',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gesv_strided_batched',
|
|
'-f gesv_strided_batched -n 10',
|
|
{
|
|
'n': '10',
|
|
'nrhs': '10',
|
|
'lda': '10',
|
|
'ldb': '10',
|
|
'strideA': '100',
|
|
'strideP': '10',
|
|
'strideB': '100',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gesvd',
|
|
'-f gesvd -n 10 -m 15',
|
|
{
|
|
'left_svect': 'N',
|
|
'right_svect': 'N',
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
'ldu': '15',
|
|
'ldv': '10',
|
|
}
|
|
),
|
|
(
|
|
'gesvd_batched',
|
|
'-f gesvd_batched -n 10 -m 15',
|
|
{
|
|
'left_svect': 'N',
|
|
'right_svect': 'N',
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
'strideS': '10',
|
|
'ldu': '15',
|
|
'strideU': '225',
|
|
'ldv': '10',
|
|
'strideV': '100',
|
|
'strideE': '9',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gesvd_strided_batched',
|
|
'-f gesvd_strided_batched -n 10 -m 15',
|
|
{
|
|
'left_svect': 'N',
|
|
'right_svect': 'N',
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
'strideA': '150',
|
|
'strideS': '10',
|
|
'ldu': '15',
|
|
'strideU': '225',
|
|
'ldv': '10',
|
|
'strideV': '100',
|
|
'strideE': '9',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'trtri',
|
|
'-f trtri -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'diag': 'N',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'trtri_batched',
|
|
'-f trtri_batched -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'diag': 'N',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'trtri_strided_batched',
|
|
'-f trtri_strided_batched -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'diag': 'N',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getri',
|
|
'-f getri -n 10',
|
|
{
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'getri_batched',
|
|
'-f getri_batched -n 10',
|
|
{
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getri_strided_batched',
|
|
'-f getri_strided_batched -n 10',
|
|
{
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getri_npvt',
|
|
'-f getri_npvt -n 10',
|
|
{
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'getri_npvt_batched',
|
|
'-f getri_npvt_batched -n 10',
|
|
{
|
|
'n': '10',
|
|
'lda': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getri_npvt_strided_batched',
|
|
'-f getri_npvt_strided_batched -n 10',
|
|
{
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getri_outofplace',
|
|
'-f getri_outofplace -n 10',
|
|
{
|
|
'n': '10',
|
|
'lda': '10',
|
|
'ldc': '10',
|
|
}
|
|
),
|
|
(
|
|
'getri_outofplace_batched',
|
|
'-f getri_outofplace_batched -n 10',
|
|
{
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideP': '10',
|
|
'ldc': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getri_outofplace_strided_batched',
|
|
'-f getri_outofplace_strided_batched -n 10',
|
|
{
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'strideP': '10',
|
|
'ldc': '10',
|
|
'strideC': '100',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getri_npvt_outofplace',
|
|
'-f getri_npvt_outofplace -n 10',
|
|
{
|
|
'n': '10',
|
|
'lda': '10',
|
|
'ldc': '10',
|
|
}
|
|
),
|
|
(
|
|
'getri_npvt_outofplace_batched',
|
|
'-f getri_npvt_outofplace_batched -n 10',
|
|
{
|
|
'n': '10',
|
|
'lda': '10',
|
|
'ldc': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'getri_npvt_outofplace_strided_batched',
|
|
'-f getri_npvt_outofplace_strided_batched -n 10',
|
|
{
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'ldc': '10',
|
|
'strideC': '100',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gels',
|
|
'-f gels -n 10 -m 15',
|
|
{
|
|
'trans': 'N',
|
|
'm': '15',
|
|
'n': '10',
|
|
'nrhs': '10',
|
|
'lda': '15',
|
|
'ldb': '15',
|
|
}
|
|
),
|
|
(
|
|
'gels_batched',
|
|
'-f gels_batched -n 10 -m 15',
|
|
{
|
|
'trans': 'N',
|
|
'm': '15',
|
|
'n': '10',
|
|
'nrhs': '10',
|
|
'lda': '15',
|
|
'ldb': '15',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gels_strided_batched',
|
|
'-f gels_strided_batched -n 10 -m 15',
|
|
{
|
|
'trans': 'N',
|
|
'm': '15',
|
|
'n': '10',
|
|
'nrhs': '10',
|
|
'lda': '15',
|
|
'ldb': '15',
|
|
'strideA': '150',
|
|
'strideB': '150',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gebd2',
|
|
'-f gebd2 -n 10 -m 15',
|
|
{
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
}
|
|
),
|
|
(
|
|
'gebd2_batched',
|
|
'-f gebd2_batched -n 10 -m 15',
|
|
{
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gebd2_strided_batched',
|
|
'-f gebd2_strided_batched -n 10 -m 15',
|
|
{
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
'strideA': '150',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gebrd',
|
|
'-f gebrd -n 10 -m 15',
|
|
{
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
}
|
|
),
|
|
(
|
|
'gebrd_batched',
|
|
'-f gebrd_batched -n 10 -m 15',
|
|
{
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'gebrd_strided_batched',
|
|
'-f gebrd_strided_batched -n 10 -m 15',
|
|
{
|
|
'm': '15',
|
|
'n': '10',
|
|
'lda': '15',
|
|
'strideA': '150',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'sytf2',
|
|
'-f sytf2 -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'sytf2_batched',
|
|
'-f sytf2_batched -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'sytf2_strided_batched',
|
|
'-f sytf2_strided_batched -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'sytrf',
|
|
'-f sytrf -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'lda': '10',
|
|
}
|
|
),
|
|
(
|
|
'sytrf_batched',
|
|
'-f sytrf_batched -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
),
|
|
(
|
|
'sytrf_strided_batched',
|
|
'-f sytrf_strided_batched -n 10',
|
|
{
|
|
'uplo': 'U',
|
|
'n': '10',
|
|
'lda': '10',
|
|
'strideA': '100',
|
|
'strideP': '10',
|
|
'batch_c': '1',
|
|
}
|
|
)
|
|
]
|
|
|
|
if __name__ == '__main__':
|
|
for name, command_options, expected_args in parameters:
|
|
test = generate_parameterized_test(command_options, expected_args)
|
|
setattr(TestRocsolverBench, f'test_{name}', test)
|
|
unittest.main()
|