derek.holloway
7502bf64a4
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667 lines
30 KiB
C++
667 lines
30 KiB
C++
/* ************************************************************************
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* Copyright (C) 2022-2026 Advanced Micro Devices, Inc. All rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* ************************************************************************ */
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#include "testing.hpp"
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#include <tuple>
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template <typename I, typename J, typename A, typename B, typename C, typename T>
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void testing_spmm_csc_bad_arg(const Arguments& arg)
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{
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static const size_t safe_size = 100;
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// Create rocsparse handle
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rocsparse_local_handle local_handle;
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rocsparse_handle handle = local_handle;
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J m = safe_size;
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J n = safe_size;
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J k = safe_size;
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I nnz = safe_size;
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const T* alpha = (const T*)0x4;
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const T* beta = (const T*)0x4;
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void* csc_val = (void*)0x4;
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void* csc_col_ptr = (void*)0x4;
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void* csc_row_ind = (void*)0x4;
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void* dense_B = (void*)0x4;
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void* dense_C = (void*)0x4;
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rocsparse_operation trans_A = rocsparse_operation_none;
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rocsparse_operation trans_B = rocsparse_operation_none;
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rocsparse_index_base base = rocsparse_index_base_zero;
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rocsparse_order order_B = rocsparse_order_column;
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rocsparse_order order_C = rocsparse_order_column;
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rocsparse_spmm_alg alg = rocsparse_spmm_alg_default;
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rocsparse_spmm_stage stage = rocsparse_spmm_stage_compute;
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rocsparse_indextype itype = get_indextype<I>();
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rocsparse_indextype jtype = get_indextype<J>();
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rocsparse_datatype atype = get_datatype<A>();
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rocsparse_datatype btype = get_datatype<B>();
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rocsparse_datatype ctype = get_datatype<C>();
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rocsparse_datatype compute_type = get_datatype<T>();
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// SpMM structures
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static const bool csc_format_required = true;
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rocsparse_local_spmat local_mat_A(m,
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k,
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nnz,
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csc_col_ptr,
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csc_row_ind,
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csc_val,
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itype,
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jtype,
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base,
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atype,
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csc_format_required);
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rocsparse_local_dnmat local_mat_B(k, n, k, dense_B, btype, order_B);
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rocsparse_local_dnmat local_mat_C(m, n, m, dense_C, ctype, order_C);
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rocsparse_spmat_descr mat_A = local_mat_A;
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rocsparse_dnmat_descr mat_B = local_mat_B;
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rocsparse_dnmat_descr mat_C = local_mat_C;
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int nargs_to_exclude = 2;
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const int args_to_exclude[2] = {11, 12};
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#define PARAMS \
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handle, trans_A, trans_B, alpha, mat_A, mat_B, beta, mat_C, compute_type, alg, stage, \
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buffer_size, temp_buffer
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{
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size_t* buffer_size = (size_t*)0x4;
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void* temp_buffer = (void*)0x4;
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select_bad_arg_analysis(rocsparse_spmm, nargs_to_exclude, args_to_exclude, PARAMS);
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}
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{
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size_t* buffer_size = (size_t*)0x4;
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void* temp_buffer = nullptr;
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select_bad_arg_analysis(rocsparse_spmm, nargs_to_exclude, args_to_exclude, PARAMS);
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}
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{
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size_t* buffer_size = nullptr;
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void* temp_buffer = (void*)0x4;
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select_bad_arg_analysis(rocsparse_spmm, nargs_to_exclude, args_to_exclude, PARAMS);
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}
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{
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size_t* buffer_size = nullptr;
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void* temp_buffer = nullptr;
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select_bad_arg_analysis(rocsparse_spmm, nargs_to_exclude, args_to_exclude, PARAMS);
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}
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#undef PARAMS
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}
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template <typename I, typename J, typename A, typename B, typename C, typename T>
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void testing_spmm_csc(const Arguments& arg)
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{
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J M = arg.M;
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J N = arg.N;
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J K = arg.K;
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rocsparse_operation trans_A = arg.transA;
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rocsparse_operation trans_B = arg.transB;
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rocsparse_index_base base = arg.baseA;
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rocsparse_spmm_alg alg = arg.spmm_alg;
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rocsparse_order order_B = arg.orderB;
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rocsparse_order order_C = arg.orderC;
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rocsparse_int ld_multiplier_B = arg.ld_multiplier_B;
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rocsparse_int ld_multiplier_C = arg.ld_multiplier_C;
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T halpha = arg.get_alpha<T>();
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T hbeta = arg.get_beta<T>();
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// Index and data type
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rocsparse_indextype itype = get_indextype<I>();
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rocsparse_indextype jtype = get_indextype<J>();
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rocsparse_datatype atype = get_datatype<A>();
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rocsparse_datatype btype = get_datatype<B>();
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rocsparse_datatype ctype = get_datatype<C>();
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rocsparse_datatype ttype = get_datatype<T>();
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// Create rocsparse handle
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rocsparse_local_handle handle(arg);
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// Allocate host memory for matrix
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host_vector<I> hcsc_col_ptr;
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host_vector<J> hcsc_row_ind;
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host_vector<A> hcsc_val;
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// Allocate host memory for matrix
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rocsparse_matrix_factory<A, I, J> matrix_factory(arg);
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I nnz_A;
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matrix_factory.init_csc(hcsc_col_ptr,
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hcsc_row_ind,
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hcsc_val,
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(trans_A == rocsparse_operation_none) ? M : K,
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(trans_A == rocsparse_operation_none) ? K : M,
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nnz_A,
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base);
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// Redefine values
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rocsparse_init_1d_array<A>(
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hcsc_val, nnz_A, arg.convert_to_int, arg.rand_gen_min, arg.rand_gen_max);
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// Some matrix properties
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J A_m = (trans_A == rocsparse_operation_none) ? M : K;
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J A_n = (trans_A == rocsparse_operation_none) ? K : M;
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J B_m = (trans_B == rocsparse_operation_none) ? K : N;
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J B_n = (trans_B == rocsparse_operation_none) ? N : K;
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J C_m = M;
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J C_n = N;
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int64_t ldb = (order_B == rocsparse_order_column)
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? ((trans_B == rocsparse_operation_none) ? (int64_t(ld_multiplier_B) * K)
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: (int64_t(ld_multiplier_B) * N))
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: ((trans_B == rocsparse_operation_none) ? (int64_t(ld_multiplier_B) * N)
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: (int64_t(ld_multiplier_B) * K));
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int64_t ldc = (order_C == rocsparse_order_column) ? (int64_t(ld_multiplier_C) * M)
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: (int64_t(ld_multiplier_C) * N);
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int64_t nrowB = (order_B == rocsparse_order_column) ? ldb : B_m;
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int64_t ncolB = (order_B == rocsparse_order_column) ? B_n : ldb;
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int64_t nrowC = (order_C == rocsparse_order_column) ? ldc : C_m;
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int64_t ncolC = (order_C == rocsparse_order_column) ? C_n : ldc;
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int64_t nnz_B = nrowB * ncolB;
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int64_t nnz_C = nrowC * ncolC;
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// Allocate host memory for vectors
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host_vector<B> hB(nnz_B);
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host_vector<C> hC_1(nnz_C);
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host_vector<C> hC_2(nnz_C);
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host_vector<C> hC_gold(nnz_C);
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// Initialize data on CPU
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rocsparse_init_1d_array<B>(hB, nnz_B, arg.convert_to_int, arg.rand_gen_min, arg.rand_gen_max);
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rocsparse_init_1d_array<C>(hC_1, nnz_C, arg.convert_to_int, arg.rand_gen_min, arg.rand_gen_max);
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hC_2 = hC_1;
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hC_gold = hC_1;
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// Allocate device memory
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device_vector<I> dcsc_col_ptr(A_n + 1);
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device_vector<J> dcsc_row_ind(nnz_A);
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device_vector<A> dcsc_val(nnz_A);
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device_vector<B> dB(nnz_B);
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device_vector<C> dC_1(nnz_C);
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device_vector<C> dC_2(nnz_C);
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device_vector<T> dalpha(1);
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device_vector<T> dbeta(1);
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// Copy data from CPU to device
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CHECK_HIP_ERROR(
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hipMemcpy(dcsc_col_ptr, hcsc_col_ptr.data(), sizeof(I) * (A_n + 1), hipMemcpyHostToDevice));
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CHECK_HIP_ERROR(
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hipMemcpy(dcsc_row_ind, hcsc_row_ind.data(), sizeof(J) * nnz_A, hipMemcpyHostToDevice));
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CHECK_HIP_ERROR(hipMemcpy(dcsc_val, hcsc_val.data(), sizeof(A) * nnz_A, hipMemcpyHostToDevice));
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CHECK_HIP_ERROR(hipMemcpy(dB, hB, sizeof(B) * nnz_B, hipMemcpyHostToDevice));
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CHECK_HIP_ERROR(hipMemcpy(dC_1, hC_1, sizeof(C) * nnz_C, hipMemcpyHostToDevice));
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CHECK_HIP_ERROR(hipMemcpy(dC_2, hC_2, sizeof(C) * nnz_C, hipMemcpyHostToDevice));
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CHECK_HIP_ERROR(hipMemcpy(dalpha, &halpha, sizeof(T), hipMemcpyHostToDevice));
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CHECK_HIP_ERROR(hipMemcpy(dbeta, &hbeta, sizeof(T), hipMemcpyHostToDevice));
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// Create descriptors
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static const bool csc_format_required = true;
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rocsparse_local_spmat mat_A(A_m,
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A_n,
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nnz_A,
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dcsc_col_ptr,
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dcsc_row_ind,
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dcsc_val,
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itype,
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jtype,
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base,
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atype,
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csc_format_required);
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ldb = std::max(int64_t(1), ldb);
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ldc = std::max(int64_t(1), ldc);
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rocsparse_local_dnmat mat_B(B_m, B_n, ldb, dB, btype, order_B);
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rocsparse_local_dnmat mat_C1(C_m, C_n, ldc, dC_1, ctype, order_C);
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rocsparse_local_dnmat mat_C2(C_m, C_n, ldc, dC_2, ctype, order_C);
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// Query SpMM buffer
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size_t buffer_size;
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CHECK_ROCSPARSE_ERROR(rocsparse_spmm(handle,
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trans_A,
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trans_B,
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&halpha,
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mat_A,
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mat_B,
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&hbeta,
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mat_C1,
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ttype,
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alg,
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rocsparse_spmm_stage_buffer_size,
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&buffer_size,
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nullptr));
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// Allocate buffer
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void* dbuffer;
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CHECK_HIP_ERROR(rocsparse_hipMalloc(&dbuffer, buffer_size));
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CHECK_ROCSPARSE_ERROR(rocsparse_spmm(handle,
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trans_A,
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trans_B,
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&halpha,
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mat_A,
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mat_B,
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&hbeta,
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mat_C1,
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ttype,
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alg,
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rocsparse_spmm_stage_preprocess,
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&buffer_size,
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dbuffer));
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if(arg.unit_check)
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{
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// SpMM
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// Pointer mode host
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CHECK_ROCSPARSE_ERROR(rocsparse_set_pointer_mode(handle, rocsparse_pointer_mode_host));
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CHECK_ROCSPARSE_ERROR(testing::rocsparse_spmm(handle,
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trans_A,
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trans_B,
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&halpha,
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mat_A,
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mat_B,
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&hbeta,
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mat_C1,
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ttype,
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alg,
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rocsparse_spmm_stage_compute,
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&buffer_size,
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dbuffer));
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if(ROCSPARSE_REPRODUCIBILITY)
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{
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rocsparse_reproducibility::save("dC_1", dC_1);
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}
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// Pointer mode device
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CHECK_ROCSPARSE_ERROR(rocsparse_set_pointer_mode(handle, rocsparse_pointer_mode_device));
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CHECK_ROCSPARSE_ERROR(testing::rocsparse_spmm(handle,
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trans_A,
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trans_B,
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dalpha,
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mat_A,
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mat_B,
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dbeta,
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mat_C2,
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ttype,
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alg,
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rocsparse_spmm_stage_compute,
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&buffer_size,
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dbuffer));
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if(ROCSPARSE_REPRODUCIBILITY)
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{
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rocsparse_reproducibility::save("dC_2", dC_2);
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}
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// Copy output to host
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CHECK_HIP_ERROR(hipMemcpy(hC_1, dC_1, sizeof(C) * nnz_C, hipMemcpyDeviceToHost));
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CHECK_HIP_ERROR(hipMemcpy(hC_2, dC_2, sizeof(C) * nnz_C, hipMemcpyDeviceToHost));
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// CPU cscmm
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host_cscmm<T, I, J, A, B, C>(A_m,
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N,
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A_n,
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trans_A,
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trans_B,
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halpha,
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hcsc_col_ptr,
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hcsc_row_ind,
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hcsc_val,
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hB,
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ldb,
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order_B,
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hbeta,
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hC_gold,
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ldc,
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order_C,
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base);
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hC_gold.near_check(hC_1, get_near_check_tol<C>(arg));
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hC_gold.near_check(hC_2, get_near_check_tol<C>(arg));
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}
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if(arg.timing)
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{
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CHECK_ROCSPARSE_ERROR(rocsparse_set_pointer_mode(handle, rocsparse_pointer_mode_host));
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const double gpu_time_used = rocsparse_clients::run_benchmark(arg,
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rocsparse_spmm,
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handle,
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trans_A,
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trans_B,
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&halpha,
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mat_A,
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mat_B,
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&hbeta,
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mat_C1,
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ttype,
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alg,
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rocsparse_spmm_stage_compute,
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&buffer_size,
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dbuffer);
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double gflop_count
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= spmm_gflop_count(N, nnz_A, (I)C_m * (I)C_n, hbeta != static_cast<T>(0));
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double gpu_gflops = get_gpu_gflops(gpu_time_used, gflop_count);
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double gbyte_count = cscmm_gbyte_count<A, B, C>(
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A_n, nnz_A, (I)B_m * (I)B_n, (I)C_m * (I)C_n, hbeta != static_cast<T>(0));
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double gpu_gbyte = get_gpu_gbyte(gpu_time_used, gbyte_count);
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display_timing_info(display_key_t::M,
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M,
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display_key_t::N,
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N,
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display_key_t::K,
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K,
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display_key_t::nnz_A,
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nnz_A,
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display_key_t::alpha,
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halpha,
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display_key_t::beta,
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hbeta,
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display_key_t::algorithm,
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rocsparse_spmmalg2string(alg),
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display_key_t::gflops,
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gpu_gflops,
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display_key_t::bandwidth,
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gpu_gbyte,
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display_key_t::time_ms,
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get_gpu_time_msec(gpu_time_used));
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}
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CHECK_HIP_ERROR(rocsparse_hipFree(dbuffer));
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}
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#define INSTANTIATE(ITYPE, JTYPE, TTYPE) \
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template void testing_spmm_csc_bad_arg<ITYPE, JTYPE, TTYPE, TTYPE, TTYPE, TTYPE>( \
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const Arguments& arg); \
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template void testing_spmm_csc<ITYPE, JTYPE, TTYPE, TTYPE, TTYPE, TTYPE>(const Arguments& arg)
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#define INSTANTIATE_MIXED(ITYPE, JTYPE, ATYPE, XTYPE, YTYPE, TTYPE) \
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template void testing_spmm_csc_bad_arg<ITYPE, JTYPE, ATYPE, XTYPE, YTYPE, TTYPE>( \
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const Arguments& arg); \
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template void testing_spmm_csc<ITYPE, JTYPE, ATYPE, XTYPE, YTYPE, TTYPE>(const Arguments& arg)
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INSTANTIATE(int32_t, int32_t, float);
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INSTANTIATE(int32_t, int32_t, double);
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INSTANTIATE(int32_t, int32_t, rocsparse_float_complex);
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INSTANTIATE(int32_t, int32_t, rocsparse_double_complex);
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INSTANTIATE(int64_t, int32_t, float);
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INSTANTIATE(int64_t, int32_t, double);
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INSTANTIATE(int64_t, int32_t, rocsparse_float_complex);
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INSTANTIATE(int64_t, int32_t, rocsparse_double_complex);
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INSTANTIATE(int64_t, int64_t, float);
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INSTANTIATE(int64_t, int64_t, double);
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INSTANTIATE(int64_t, int64_t, rocsparse_float_complex);
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INSTANTIATE(int64_t, int64_t, rocsparse_double_complex);
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INSTANTIATE_MIXED(int32_t, int32_t, int8_t, int8_t, int32_t, int32_t);
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INSTANTIATE_MIXED(int64_t, int32_t, int8_t, int8_t, int32_t, int32_t);
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INSTANTIATE_MIXED(int64_t, int64_t, int8_t, int8_t, int32_t, int32_t);
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INSTANTIATE_MIXED(int32_t, int32_t, int8_t, int8_t, float, float);
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INSTANTIATE_MIXED(int64_t, int32_t, int8_t, int8_t, float, float);
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INSTANTIATE_MIXED(int64_t, int64_t, int8_t, int8_t, float, float);
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INSTANTIATE_MIXED(int32_t, int32_t, _Float16, _Float16, float, float);
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INSTANTIATE_MIXED(int64_t, int32_t, _Float16, _Float16, float, float);
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INSTANTIATE_MIXED(int64_t, int64_t, _Float16, _Float16, float, float);
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INSTANTIATE_MIXED(int32_t, int32_t, rocsparse_bfloat16, rocsparse_bfloat16, float, float);
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INSTANTIATE_MIXED(int64_t, int32_t, rocsparse_bfloat16, rocsparse_bfloat16, float, float);
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INSTANTIATE_MIXED(int64_t, int64_t, rocsparse_bfloat16, rocsparse_bfloat16, float, float);
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INSTANTIATE_MIXED(int32_t, int32_t, _Float16, _Float16, _Float16, float);
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INSTANTIATE_MIXED(int64_t, int32_t, _Float16, _Float16, _Float16, float);
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INSTANTIATE_MIXED(int64_t, int64_t, _Float16, _Float16, _Float16, float);
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INSTANTIATE_MIXED(
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int32_t, int32_t, rocsparse_bfloat16, rocsparse_bfloat16, rocsparse_bfloat16, float);
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INSTANTIATE_MIXED(
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int64_t, int32_t, rocsparse_bfloat16, rocsparse_bfloat16, rocsparse_bfloat16, float);
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INSTANTIATE_MIXED(
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int64_t, int64_t, rocsparse_bfloat16, rocsparse_bfloat16, rocsparse_bfloat16, float);
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void testing_spmm_csc_extra(const Arguments& arg)
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{
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// Validate the CSC SpMM default-algorithm auto-selection end to end.
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//
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// This is the CSC counterpart of testing_spmm_csr_extra. A non-transposed
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// CSC multiply is delegated to csrmm as a transposed multiply and vice
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// versa, and the load-balanced kernels only apply to the non-transposed
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// csrmm path. For CSC that is the transposed SpMM operation, so the test
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// drives trans_A = transpose; the structural skew that matters is then the
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// longest CSC column, whose column-pointer array acts as the implicit CSR
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// row pointer feeding the line-nnz profile and the selection it drives.
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//
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// The kernel the default resolves to is deliberately not observable through
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// the public API (buffer_size is sized conservatively for the largest
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// auto-selectable kernel and every kernel computes the same product), so
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// the test runs the full buffer_size -> preprocess -> compute pipeline and
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// checks that the default reproduces the analytic product in both asymptotic
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// skew regimes and agrees with the explicit row-split and non-zero-split
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// kernels.
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//
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// The two synthetic matrices below sit at the asymptotic ends of the
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// dimensionless gate (longest-column share -> 1 vs -> 0), so the exercised
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// decision is independent of the device compute-unit count, and therefore
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// of the architecture.
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rocsparse_local_handle local_handle;
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rocsparse_handle handle = local_handle;
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const rocsparse_datatype ttype = get_datatype<double>();
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const rocsparse_indextype itype = get_indextype<int32_t>();
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const rocsparse_indextype jtype = get_indextype<int32_t>();
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const rocsparse_index_base base = rocsparse_index_base_zero;
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const rocsparse_order order = rocsparse_order_column;
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const double alpha = 1.0;
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const double beta = 0.0;
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const int32_t n = 2; // dense columns of B and C
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// Run the full three-stage CSC SpMM for one structure and algorithm and copy
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// the dense result C back to the host. Returns through an out-parameter
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// because the CHECK_*_ERROR macros expand to GoogleTest ASSERT_*, which may
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// only be used in a void-returning function. With trans_A = transpose and
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// every matrix and B entry equal to one (alpha = 1, beta = 0), C[i, j] is
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// exactly the number of non-zeros in column i, an integer represented
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// exactly in double.
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auto run_spmm = [&](const host_vector<int32_t>& hcol_ptr,
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const host_vector<int32_t>& hrow_ind,
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int32_t rows,
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rocsparse_spmm_alg alg,
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host_vector<double>& hC) {
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const int32_t cols = static_cast<int32_t>(hcol_ptr.size()) - 1;
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const int64_t nnz = static_cast<int64_t>(hrow_ind.size());
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const host_vector<double> hval(nnz, 1.0);
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const host_vector<double> hB(int64_t(rows) * n, 1.0);
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device_vector<int32_t> dcol_ptr(cols + 1);
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device_vector<int32_t> drow_ind(nnz);
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device_vector<double> dval(nnz);
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device_vector<double> dB(int64_t(rows) * n);
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device_vector<double> dC(int64_t(cols) * n);
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CHECK_HIP_ERROR(hipMemcpy(
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dcol_ptr, hcol_ptr.data(), sizeof(int32_t) * (cols + 1), hipMemcpyHostToDevice));
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CHECK_HIP_ERROR(
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hipMemcpy(drow_ind, hrow_ind.data(), sizeof(int32_t) * nnz, hipMemcpyHostToDevice));
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CHECK_HIP_ERROR(hipMemcpy(dval, hval.data(), sizeof(double) * nnz, hipMemcpyHostToDevice));
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CHECK_HIP_ERROR(
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hipMemcpy(dB, hB.data(), sizeof(double) * int64_t(rows) * n, hipMemcpyHostToDevice));
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static const bool csc_format_required = true;
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rocsparse_local_spmat mat_A(rows,
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cols,
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nnz,
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dcol_ptr,
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drow_ind,
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dval,
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itype,
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jtype,
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base,
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ttype,
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csc_format_required);
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// op(A) = A^T is cols x rows, so op(B) = B is rows x n and C is cols x n.
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rocsparse_local_dnmat mat_B(rows, n, rows, dB, ttype, order);
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rocsparse_local_dnmat mat_C(cols, n, cols, dC, ttype, order);
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size_t buffer_size = 0;
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CHECK_ROCSPARSE_ERROR(rocsparse_spmm(handle,
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rocsparse_operation_transpose,
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rocsparse_operation_none,
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&alpha,
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mat_A,
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mat_B,
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&beta,
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mat_C,
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ttype,
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alg,
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rocsparse_spmm_stage_buffer_size,
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&buffer_size,
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nullptr));
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void* dbuffer = nullptr;
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CHECK_HIP_ERROR(rocsparse_hipMalloc(&dbuffer, buffer_size > 0 ? buffer_size : 1));
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CHECK_ROCSPARSE_ERROR(rocsparse_spmm(handle,
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rocsparse_operation_transpose,
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rocsparse_operation_none,
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&alpha,
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mat_A,
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mat_B,
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&beta,
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mat_C,
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ttype,
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alg,
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rocsparse_spmm_stage_preprocess,
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&buffer_size,
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dbuffer));
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CHECK_ROCSPARSE_ERROR(rocsparse_spmm(handle,
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rocsparse_operation_transpose,
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rocsparse_operation_none,
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&alpha,
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mat_A,
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mat_B,
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&beta,
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mat_C,
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ttype,
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alg,
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rocsparse_spmm_stage_compute,
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&buffer_size,
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dbuffer));
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hC.resize(int64_t(cols) * n);
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CHECK_HIP_ERROR(
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hipMemcpy(hC.data(), dC, sizeof(double) * int64_t(cols) * n, hipMemcpyDeviceToHost));
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CHECK_HIP_ERROR(rocsparse_hipFree(dbuffer));
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};
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// For one structure, check that the default reproduces the analytic product
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// and matches both explicit load-balanced kernels.
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auto check_structure = [&](const host_vector<int32_t>& hcol_ptr,
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const host_vector<int32_t>& hrow_ind,
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int32_t rows) {
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const int32_t cols = static_cast<int32_t>(hcol_ptr.size()) - 1;
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// Analytic reference C[i, j] = non-zeros in column i (column-major, ld = cols).
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host_vector<double> hC_ref(int64_t(cols) * n);
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for(int32_t j = 0; j < n; ++j)
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{
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for(int32_t i = 0; i < cols; ++i)
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{
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hC_ref[int64_t(j) * cols + i] = static_cast<double>(hcol_ptr[i + 1] - hcol_ptr[i]);
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}
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}
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host_vector<double> hC_default, hC_row, hC_nnz;
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run_spmm(hcol_ptr, hrow_ind, rows, rocsparse_spmm_alg_default, hC_default);
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run_spmm(hcol_ptr, hrow_ind, rows, rocsparse_spmm_alg_csr_row_split, hC_row);
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run_spmm(hcol_ptr, hrow_ind, rows, rocsparse_spmm_alg_csr_nnz_split, hC_nnz);
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unit_check_general<double>(cols, n, hC_ref.data(), cols, hC_default.data(), cols);
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unit_check_general<double>(cols, n, hC_ref.data(), cols, hC_row.data(), cols);
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unit_check_general<double>(cols, n, hC_ref.data(), cols, hC_nnz.data(), cols);
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};
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// Extremely column-skewed matrix: one "hub" column holds almost all
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// non-zeros, the rest a single entry. Longest-column share -> 1, so the gate
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// is free to upgrade to the non-zero-split kernel; the default must still be
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// correct.
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{
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const int32_t hub_nnz = 65536;
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const int32_t cols = 8;
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const int32_t rows = hub_nnz;
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host_vector<int32_t> hcol_ptr(cols + 1, 0);
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host_vector<int32_t> hrow_ind;
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hrow_ind.reserve(hub_nnz + (cols - 1));
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for(int32_t r = 0; r < hub_nnz; ++r)
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{
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hrow_ind.push_back(r);
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}
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hcol_ptr[1] = hub_nnz;
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for(int32_t c = 1; c < cols; ++c)
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{
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hrow_ind.push_back(0);
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hcol_ptr[c + 1] = hcol_ptr[c] + 1;
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}
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check_structure(hcol_ptr, hrow_ind, rows);
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}
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// Extremely uniform matrix: every column has the same small length.
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// Longest-column share -> 0, so the gate keeps the row-split default; the
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// default must stay correct.
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{
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const int32_t col_nnz = 4;
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const int32_t cols = 100000;
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const int32_t rows = col_nnz;
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host_vector<int32_t> hcol_ptr(cols + 1, 0);
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host_vector<int32_t> hrow_ind;
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hrow_ind.reserve(int64_t(cols) * col_nnz);
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for(int32_t c = 0; c < cols; ++c)
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{
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for(int32_t r = 0; r < col_nnz; ++r)
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{
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hrow_ind.push_back(r);
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}
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hcol_ptr[c + 1] = hcol_ptr[c] + col_nnz;
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}
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check_structure(hcol_ptr, hrow_ind, rows);
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}
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}
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