derek.holloway
7502bf64a4
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499 lines
14 KiB
YAML
499 lines
14 KiB
YAML
# ########################################################################
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# Copyright (C) 2022-2026 Advanced Micro Devices, Inc. All rights Reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
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# of this software and associated documentation files (the "Software"), to deal
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# in the Software without restriction, including without limitation the rights
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# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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# copies of the Software, and to permit persons to whom the Software is
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# furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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# THE SOFTWARE.
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#
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# ########################################################################
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---
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include: rocsparse_common.yaml
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Definitions:
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- &alpha_beta_range_quick
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- { alpha: 1.0, beta: -1.0, alphai: 1.0, betai: -0.5 }
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- &alpha_beta_range_checkin
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- { alpha: 0.0, beta: 1.0, alphai: 1.5, betai: 0.5 }
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- { alpha: 3.0, beta: 1.0, alphai: 2.0, betai: -0.5 }
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- &alpha_beta_range_nightly
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- { alpha: -0.5, beta: 0.5, alphai: 1.0, betai: -0.5 }
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- { alpha: -1.0, beta: -0.5, alphai: 0.0, betai: 0.0 }
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- &alpha_beta_range_stress
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- { alpha: 1.0, beta: 0.0, alphai: 0.0, betai: 0.0 }
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Tests:
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# ##############################
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# # Quick
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# ##############################
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- name: spmm_batched_csr
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category: quick
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function: spmm_batched_csr
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indextype: *i32
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precision: *single_only_precisions
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M: [15, 32]
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N: [2, 3]
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K: [7, 27]
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batch_count_A: [1]
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batch_count_B: [7]
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batch_count_C: [7]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none, rocsparse_operation_transpose]
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transB: [rocsparse_operation_none, rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_column]
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orderC: [rocsparse_order_column]
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- name: spmm_batched_csr
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category: quick
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function: spmm_batched_csr
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indextype: *i64i32
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precision: *double_only_precisions
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M: [155, 300]
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N: [22, 39]
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K: [72, 265]
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batch_count_A: [5]
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batch_count_B: [1]
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batch_count_C: [5]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none, rocsparse_operation_transpose]
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transB: [rocsparse_operation_none, rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_one]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_row]
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orderC: [rocsparse_order_row]
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- name: spmm_batched_csr
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category: quick
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function: spmm_batched_csr
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indextype: *i32
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precision: *single_only_precisions_complex
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M: [300]
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N: [300]
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K: [1324]
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batch_count_A: [8]
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batch_count_B: [8]
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batch_count_C: [8]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none, rocsparse_operation_transpose]
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transB: [rocsparse_operation_none, rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_column]
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orderC: [rocsparse_order_column]
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- name: spmm_batched_csr
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category: quick
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function: spmm_batched_csr
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indextype: *i64
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precision: *int8_int8_int32_int32_abct_precision
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M: [300]
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N: [187]
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K: [482]
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batch_count_A: [9]
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batch_count_B: [1]
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batch_count_C: [9]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none, rocsparse_operation_transpose]
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transB: [rocsparse_operation_none, rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_column]
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orderC: [rocsparse_order_row]
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rand_gen_min: -128.0
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rand_gen_max: 127.0
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convert_to_int: true
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- name: spmm_batched_csr
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category: quick
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function: spmm_batched_csr
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indextype: *i32
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precision: *int8_int8_float32_float32_abct_precision
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M: [286]
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N: [109]
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K: [568]
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batch_count_A: [1]
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batch_count_B: [10]
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batch_count_C: [10]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none, rocsparse_operation_transpose]
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transB: [rocsparse_operation_none, rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_row]
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orderC: [rocsparse_order_column]
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rand_gen_min: -128.0
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rand_gen_max: 127.0
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convert_to_int: true
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##############################
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# Precheckin
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##############################
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- name: spmm_batched_csr_bad_arg
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category: pre_checkin
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function: spmm_batched_csr_bad_arg
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indextype: *i32
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precision: *single_only_precisions
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- name: spmm_batched_csr_file
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category: pre_checkin
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function: spmm_batched_csr
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indextype: *i64i32
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precision: *double_only_precisions
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M: 1
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N: [15]
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K: 1
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batch_count_A: [13]
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batch_count_B: [13]
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batch_count_C: [13]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_column]
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orderC: [rocsparse_order_row]
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filename: [nos1,
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nos2,
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nos3,
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nos4,
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nos5,
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nos6,
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nos7]
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- name: spmm_batched_csr_file
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category: pre_checkin
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function: spmm_batched_csr
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indextype: *i64i32
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precision: *single_double_precisions
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M: 1
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N: [9]
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K: 1
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batch_count_A: [1]
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batch_count_B: [3]
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batch_count_C: [3]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_row]
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orderC: [rocsparse_order_column]
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filename: [amazon0312]
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- name: spmm_batched_csr_file
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category: pre_checkin
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function: spmm_batched_csr
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indextype: *i64i32
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precision: *double_only_precisions
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M: 1
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N: [6]
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K: 1
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batch_count_A: [12]
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batch_count_B: [12]
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batch_count_C: [12]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_row]
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orderC: [rocsparse_order_column]
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filename: [scircuit]
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- name: spmm_batched_csr_file
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category: pre_checkin
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function: spmm_batched_csr
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indextype: *i64i32
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precision: *double_only_precisions_complex
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M: 1
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N: [17]
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K: 1
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batch_count_A: [5]
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batch_count_B: [1]
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batch_count_C: [5]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_one]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_row]
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orderC: [rocsparse_order_row]
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filename: [Chebyshev4]
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- name: spmm_batched_csr_file
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category: pre_checkin
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function: spmm_batched_csr
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indextype: *i32
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precision: *int8_int8_int32_int32_abct_precision
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M: 1
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N: [56]
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K: 1
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batch_count_A: [4]
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batch_count_B: [1]
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batch_count_C: [4]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none, rocsparse_operation_transpose]
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transB: [rocsparse_operation_none, rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_column]
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orderC: [rocsparse_order_column]
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filename: [nos6,
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nos7]
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rand_gen_min: -128.0
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rand_gen_max: 127.0
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convert_to_int: true
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- name: spmm_batched_csr_graph_test
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category: pre_checkin
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function: spmm_batched_csr
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indextype: *i64
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precision: *double_only_precisions
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M: [155, 326]
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N: [22, 39]
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K: [72, 117, 279]
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batch_count_A: [13]
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batch_count_B: [1]
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batch_count_C: [13]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none, rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_one]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_row]
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orderC: [rocsparse_order_column]
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graph_test: true
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- name: spmm_batched_csr_graph_test
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category: pre_checkin
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function: spmm_batched_csr
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indextype: *i32
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precision: *double_only_precisions
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M: [155, 326]
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N: [22, 39]
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K: [72, 117, 279]
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batch_count_A: [1]
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batch_count_B: [3]
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batch_count_C: [3]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none, rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_one]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_row]
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orderC: [rocsparse_order_row]
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graph_test: true
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- name: spmm_batched_csr_graph_test
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category: pre_checkin
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function: spmm_batched_csr
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indextype: *i64i32
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precision: *double_only_precisions
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M: [155, 326]
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N: [22, 39]
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K: [72, 117, 279]
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batch_count_A: [12]
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batch_count_B: [12]
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batch_count_C: [12]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none, rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_one]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_row]
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orderC: [rocsparse_order_column]
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graph_test: true
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##############################
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# Nightly
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##############################
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- name: spmm_batched_csr
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category: nightly
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function: spmm_batched_csr
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indextype: *i64
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precision: *single_double_precisions_complex_real
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M: [431]
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N: [273]
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K: [97]
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batch_count_A: [1]
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batch_count_B: [23]
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batch_count_C: [23]
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alpha_beta: *alpha_beta_range_nightly
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_column]
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orderC: [rocsparse_order_column]
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- name: spmm_batched_csr_file
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category: nightly
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function: spmm_batched_csr
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indextype: *i64i32
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precision: *double_only_precisions
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M: 1
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N: [14]
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K: 1
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batch_count_A: [4]
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batch_count_B: [1]
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batch_count_C: [4]
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alpha_beta: *alpha_beta_range_nightly
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_one]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_column, rocsparse_order_row]
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orderC: [rocsparse_order_row]
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filename: [sme3Dc]
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- name: spmm_batched_csr_file
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category: nightly
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function: spmm_batched_csr
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indextype: *i64i32
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precision: *double_only_precisions
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M: 1
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N: [56]
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K: 1
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batch_count_A: [2]
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batch_count_B: [2]
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batch_count_C: [2]
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alpha_beta: *alpha_beta_range_nightly
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_one]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_csr]
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orderB: [rocsparse_order_row]
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orderC: [rocsparse_order_column]
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filename: [webbase-1M]
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- name: spmm_batched_csr_file
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category: nightly
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function: spmm_batched_csr
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indextype: *i32
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precision: *single_double_precisions_complex
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M: 1
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N: [22]
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K: 1
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batch_count_A: [7]
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batch_count_B: [1]
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batch_count_C: [7]
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alpha_beta: *alpha_beta_range_nightly
|
|
transA: [rocsparse_operation_none]
|
|
transB: [rocsparse_operation_transpose]
|
|
baseA: [rocsparse_index_base_zero]
|
|
matrix: [rocsparse_matrix_file_rocalution]
|
|
spmm_alg: [rocsparse_spmm_alg_csr]
|
|
orderB: [rocsparse_order_column]
|
|
orderC: [rocsparse_order_column]
|
|
filename: [Chevron2]
|
|
|
|
- name: spmm_batched_csr_file
|
|
category: nightly
|
|
function: spmm_batched_csr
|
|
indextype: *i32
|
|
precision: *int8_int8_float32_float32_abct_precision
|
|
M: 1
|
|
N: [77]
|
|
K: 1
|
|
batch_count_A: [1]
|
|
batch_count_B: [6]
|
|
batch_count_C: [6]
|
|
alpha_beta: *alpha_beta_range_quick
|
|
transA: [rocsparse_operation_none, rocsparse_operation_transpose]
|
|
transB: [rocsparse_operation_none, rocsparse_operation_transpose]
|
|
baseA: [rocsparse_index_base_zero]
|
|
matrix: [rocsparse_matrix_file_rocalution]
|
|
spmm_alg: [rocsparse_spmm_alg_csr]
|
|
orderB: [rocsparse_order_row]
|
|
orderC: [rocsparse_order_column]
|
|
filename: [mc2depi]
|
|
rand_gen_min: -128.0
|
|
rand_gen_max: 127.0
|
|
convert_to_int: true
|
|
|
|
- name: spmm_batched_csr_file
|
|
category: nightly
|
|
function: spmm_batched_csr
|
|
indextype: *i64
|
|
precision: *double_only_precisions
|
|
M: 1
|
|
N: [15]
|
|
K: 1
|
|
batch_count_A: [10]
|
|
batch_count_B: [1]
|
|
batch_count_C: [10]
|
|
alpha_beta: *alpha_beta_range_nightly
|
|
transA: [rocsparse_operation_none]
|
|
transB: [rocsparse_operation_transpose]
|
|
baseA: [rocsparse_index_base_zero]
|
|
matrix: [rocsparse_matrix_file_rocalution]
|
|
spmm_alg: [rocsparse_spmm_alg_csr]
|
|
orderB: [rocsparse_order_column]
|
|
orderC: [rocsparse_order_row]
|
|
filename: [bmwcra_1]
|
|
|
|
##############################
|
|
# Stress
|
|
##############################
|
|
|
|
- name: spmm_batched_csr_file
|
|
category: stress
|
|
hardware: [gfx90a]
|
|
function: spmm_batched_csr
|
|
indextype: *i32
|
|
precision: *single_only_precisions
|
|
M: 1
|
|
N: [2]
|
|
K: 1
|
|
batch_count_A: [2]
|
|
batch_count_B: [1]
|
|
batch_count_C: [2]
|
|
ld_multiplier_B: [5364]
|
|
ld_multiplier_C: [5124]
|
|
alpha_beta: *alpha_beta_range_stress
|
|
transA: [rocsparse_operation_none]
|
|
transB: [rocsparse_operation_none]
|
|
baseA: [rocsparse_index_base_zero]
|
|
matrix: [rocsparse_matrix_file_rocalution]
|
|
spmm_alg: [rocsparse_spmm_alg_csr]
|
|
orderB: [rocsparse_order_row, rocsparse_order_column]
|
|
orderC: [rocsparse_order_row, rocsparse_order_column]
|
|
filename: [mac_econ_fwd500]
|