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626 lines
17 KiB
YAML
626 lines
17 KiB
YAML
# ########################################################################
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# Copyright (C) 2024-2026 Advanced Micro Devices, Inc. All rights Reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
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# of this software and associated documentation files (the "Software"), to deal
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# in the Software without restriction, including without limitation the rights
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# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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# copies of the Software, and to permit persons to whom the Software is
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# furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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# THE SOFTWARE.
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#
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# ########################################################################
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---
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include: rocsparse_common.yaml
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Definitions:
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- &alpha_beta_range_quick
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- { alpha: 1.0, beta: -1.0, alphai: 1.0, betai: -0.5 }
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- &alpha_beta_range_checkin
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- { alpha: 0.0, beta: 1.0, alphai: 1.5, betai: 0.5 }
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- { alpha: 3.0, beta: 1.0, alphai: 2.0, betai: -0.5 }
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- &alpha_beta_range_nightly
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- { alpha: -0.5, beta: 0.5, alphai: 1.0, betai: -0.5 }
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- { alpha: -1.0, beta: -0.5, alphai: 0.0, betai: 0.0 }
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- &alpha_beta_range_stress
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- { alpha: 1.0, beta: 0.0, alphai: 0.0, betai: 0.0 }
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Tests:
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- name: spmm_bsr_bad_arg
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category: pre_checkin
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function: spmm_bsr_bad_arg
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indextype: *i32i32_i64i32_i64i64
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precision: *single_double_precisions_complex_real
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##############################
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# Quick
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##############################
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- name: spmm_bsr
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category: quick
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function: spmm_bsr
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indextype: *i32i32_i64i32_i64i64
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precision: *single_double_precisions_complex_real
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M: [145]
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N: [117]
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K: [172]
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block_dim: [1, 5, 9, 13]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none, rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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direction: [rocsparse_direction_row]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_column]
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orderC: [rocsparse_order_column]
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- name: spmm_bsr
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category: quick
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function: spmm_bsr
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indextype: *i32
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precision: *single_double_precisions_complex_real
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M: [8, 223]
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N: [8, 300]
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K: [0, 167]
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block_dim: [4]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_zero]
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direction: [rocsparse_direction_column]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_column]
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orderC: [rocsparse_order_row]
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- name: spmm_bsr_file
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category: quick
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function: spmm_bsr
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indextype: *i64i32
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precision: *single_double_precisions
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M: 1
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N: [100]
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K: 1
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block_dim: [2]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none, rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_one]
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direction: [rocsparse_direction_row]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_column, rocsparse_order_row]
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orderC: [rocsparse_order_column]
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filename: [nos1]
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- name: spmm_bsr_file
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category: quick
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function: spmm_bsr
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indextype: *i64
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precision: *single_double_precisions
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M: 1
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N: [57]
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K: 1
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block_dim: [6]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none, rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_one]
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direction: [rocsparse_direction_row]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_column, rocsparse_order_row]
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orderC: [rocsparse_order_column]
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filename: [nos2]
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- name: spmm_bsr_file
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category: quick
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function: spmm_bsr
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indextype: *i32
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precision: *single_double_precisions_complex
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M: 1
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N: [7]
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K: 1
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block_dim: [3]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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direction: [rocsparse_direction_column]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_column]
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orderC: [rocsparse_order_row]
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filename: [mplate]
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- name: spmm_bsr
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category: quick
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function: spmm_bsr
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indextype: *i32
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precision: *float16_float16_float32_float32_abct_precision
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M: [300]
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N: [16, 23]
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K: [847]
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block_dim: [2, 5, 8]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_row]
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orderC: [rocsparse_order_row]
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- name: spmm_bsr
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category: quick
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function: spmm_bsr
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indextype: *i32
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precision: *bfloat16_bfloat16_float32_float32_abct_precision
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M: [300]
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N: [144]
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K: [56478]
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block_dim: [12]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_column]
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orderC: [rocsparse_order_row]
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- name: spmm_bsr
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category: quick
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function: spmm_bsr
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indextype: *i32
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precision: [*float16_float16_float32_float32_abct_precision, *bfloat16_bfloat16_float32_float32_abct_precision]
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M: [300]
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N: [32]
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K: [512]
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block_dim: [2, 3, 8]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none, rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_column]
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orderC: [rocsparse_order_column]
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##############################
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# Precheckin
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##############################
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- name: spmm_bsr
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category: pre_checkin
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function: spmm_bsr
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indextype: *i32i32_i64i32_i64i64
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precision: *single_double_precisions
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M: [311]
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N: [441]
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K: [82]
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block_dim: [5, 10]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none, rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_one]
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direction: [rocsparse_direction_row]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_row, rocsparse_order_column]
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orderC: [rocsparse_order_column]
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- name: spmm_bsr_file
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category: pre_checkin
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function: spmm_bsr
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indextype: *i32_i64
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precision: *double_only_precisions_complex
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M: 1
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N: [16]
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K: 1
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block_dim: [8]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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direction: [rocsparse_direction_column]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_row]
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orderC: [rocsparse_order_column]
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filename: [mplate]
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- name: spmm_bsr_file
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category: pre_checkin
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function: spmm_bsr
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indextype: *i32i32_i64i32_i64i64
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precision: *double_only_precisions
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M: 1
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N: [54]
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K: 1
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block_dim: [2, 11, 12]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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direction: [rocsparse_direction_row]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_column]
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orderC: [rocsparse_order_row]
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filename: [nos3]
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- name: spmm_bsr_file
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category: pre_checkin
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function: spmm_bsr
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indextype: *i32i32_i64i32_i64i64
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precision: *single_double_precisions
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M: 1
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N: [9]
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K: 1
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block_dim: [4, 14]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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direction: [rocsparse_direction_column]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_row]
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orderC: [rocsparse_order_row]
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filename: [nos4]
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- name: spmm_bsr_file
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category: pre_checkin
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function: spmm_bsr
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indextype: *i64i32
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precision: *double_only_precisions
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M: 1
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N: [47]
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K: 1
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block_dim: [3, 15]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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direction: [rocsparse_direction_row]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_column]
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orderC: [rocsparse_order_column]
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filename: [nos5]
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- name: spmm_bsr_file
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category: pre_checkin
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function: spmm_bsr
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indextype: *i64i32
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precision: *single_double_precisions_complex
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M: 1
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N: [4]
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K: 1
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block_dim: [7, 16]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_one]
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direction: [rocsparse_direction_column]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_row]
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orderC: [rocsparse_order_row]
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filename: [nos6]
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- name: spmm_bsr_file
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category: pre_checkin
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function: spmm_bsr
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indextype: *i32i32_i64i32_i64i64
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precision: *double_only_precisions
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M: 1
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N: [6]
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K: 1
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block_dim: [8, 17]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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direction: [rocsparse_direction_row]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_row]
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orderC: [rocsparse_order_column]
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filename: [nos7]
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- name: spmm_bsr_file
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category: pre_checkin
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function: spmm_bsr
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indextype: *i64i32
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precision: *double_only_precisions
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M: 1
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N: [21]
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K: 1
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block_dim: [4]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_transpose]
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baseA: [rocsparse_index_base_zero]
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direction: [rocsparse_direction_row]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_column]
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orderC: [rocsparse_order_column]
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filename: [scircuit]
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- name: spmm_bsr_file
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category: pre_checkin
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function: spmm_bsr
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indextype: *i64i32
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precision: *double_only_precisions_complex
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M: 1
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N: [17]
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K: 1
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block_dim: [2]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_one]
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direction: [rocsparse_direction_column]
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matrix: [rocsparse_matrix_file_rocalution]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_row]
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orderC: [rocsparse_order_row]
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filename: [Chevron2]
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- name: spmm_bsr
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category: pre_checkin
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function: spmm_bsr
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indextype: *i32
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precision: *float16_float16_float32_float32_abct_precision
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M: [2000]
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N: [21, 27]
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K: [13724]
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block_dim: [3, 4, 5]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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transB: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_random]
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spmm_alg: [rocsparse_spmm_alg_bsr]
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orderB: [rocsparse_order_column]
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orderC: [rocsparse_order_row]
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- name: spmm_bsr
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category: pre_checkin
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function: spmm_bsr
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indextype: *i32
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precision: [*float16_float16_float32_float32_abct_precision, *bfloat16_bfloat16_float32_float32_abct_precision]
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M: [1024]
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N: [32, 64]
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K: [1024]
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block_dim: [2, 4, 8]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
|
|
transB: [rocsparse_operation_none, rocsparse_operation_transpose]
|
|
baseA: [rocsparse_index_base_zero]
|
|
matrix: [rocsparse_matrix_random]
|
|
spmm_alg: [rocsparse_spmm_alg_bsr]
|
|
orderB: [rocsparse_order_column]
|
|
orderC: [rocsparse_order_column]
|
|
|
|
- name: spmm_bsr_graph_test
|
|
category: pre_checkin
|
|
function: spmm_bsr
|
|
indextype: *i32i32_i64i32_i64i64
|
|
precision: *double_only_precisions
|
|
M: [223, 485]
|
|
N: [223]
|
|
K: [223, 485, 647]
|
|
block_dim: [11]
|
|
alpha_beta: *alpha_beta_range_quick
|
|
transA: [rocsparse_operation_none]
|
|
transB: [rocsparse_operation_none, rocsparse_operation_transpose]
|
|
baseA: [rocsparse_index_base_zero]
|
|
direction: [rocsparse_direction_column]
|
|
matrix: [rocsparse_matrix_random]
|
|
spmm_alg: [rocsparse_spmm_alg_bsr]
|
|
orderB: [rocsparse_order_column]
|
|
orderC: [rocsparse_order_row]
|
|
graph_test: true
|
|
|
|
|
|
##############################
|
|
# Nightly
|
|
##############################
|
|
|
|
- name: spmm_bsr
|
|
category: nightly
|
|
function: spmm_bsr
|
|
indextype: *i32i32_i64i32_i64i64
|
|
precision: *single_double_precisions_complex_real
|
|
M: [431]
|
|
N: [273]
|
|
K: [97]
|
|
block_dim: [21]
|
|
alpha_beta: *alpha_beta_range_nightly
|
|
transA: [rocsparse_operation_none]
|
|
transB: [rocsparse_operation_none]
|
|
baseA: [rocsparse_index_base_zero]
|
|
direction: [rocsparse_direction_row]
|
|
matrix: [rocsparse_matrix_random]
|
|
spmm_alg: [rocsparse_spmm_alg_bsr]
|
|
orderB: [rocsparse_order_column]
|
|
orderC: [rocsparse_order_column]
|
|
|
|
- name: spmm_bsr_file
|
|
category: nightly
|
|
function: spmm_bsr
|
|
indextype: *i64i32
|
|
precision: *double_only_precisions
|
|
M: 1
|
|
N: [14]
|
|
K: 1
|
|
block_dim: [2]
|
|
alpha_beta: *alpha_beta_range_nightly
|
|
transA: [rocsparse_operation_none]
|
|
transB: [rocsparse_operation_transpose]
|
|
baseA: [rocsparse_index_base_one]
|
|
direction: [rocsparse_direction_column]
|
|
matrix: [rocsparse_matrix_file_rocalution]
|
|
spmm_alg: [rocsparse_spmm_alg_bsr]
|
|
orderB: [rocsparse_order_column, rocsparse_order_row]
|
|
orderC: [rocsparse_order_row]
|
|
filename: [sme3Dc]
|
|
|
|
- name: spmm_bsr_file
|
|
category: nightly
|
|
function: spmm_bsr
|
|
indextype: *i32_i64
|
|
precision: *double_only_precisions
|
|
M: 1
|
|
N: [48]
|
|
K: 1
|
|
block_dim: [3]
|
|
tolm: 4
|
|
alpha_beta: *alpha_beta_range_nightly
|
|
transA: [rocsparse_operation_none]
|
|
transB: [rocsparse_operation_none]
|
|
baseA: [rocsparse_index_base_one]
|
|
direction: [rocsparse_direction_row]
|
|
matrix: [rocsparse_matrix_file_rocalution]
|
|
spmm_alg: [rocsparse_spmm_alg_bsr]
|
|
orderB: [rocsparse_order_row]
|
|
orderC: [rocsparse_order_column]
|
|
filename: [shipsec1]
|
|
|
|
- name: spmm_bsr_file
|
|
category: nightly
|
|
function: spmm_bsr
|
|
indextype: *i32_i64
|
|
precision: *double_only_precisions
|
|
M: 1
|
|
N: [21]
|
|
K: 1
|
|
block_dim: [4]
|
|
alpha_beta: *alpha_beta_range_nightly
|
|
transA: [rocsparse_operation_none]
|
|
transB: [rocsparse_operation_none]
|
|
baseA: [rocsparse_index_base_one]
|
|
direction: [rocsparse_direction_column]
|
|
matrix: [rocsparse_matrix_file_rocalution]
|
|
spmm_alg: [rocsparse_spmm_alg_bsr]
|
|
orderB: [rocsparse_order_row]
|
|
orderC: [rocsparse_order_column]
|
|
filename: [ASIC_320k]
|
|
|
|
- name: spmm_bsr_file
|
|
category: nightly
|
|
function: spmm_bsr
|
|
indextype: *i32_i64
|
|
precision: *single_only_precisions_complex
|
|
M: 1
|
|
N: [12]
|
|
K: 1
|
|
block_dim: [9]
|
|
alpha_beta: *alpha_beta_range_nightly
|
|
transA: [rocsparse_operation_none]
|
|
transB: [rocsparse_operation_transpose]
|
|
baseA: [rocsparse_index_base_zero]
|
|
direction: [rocsparse_direction_row]
|
|
matrix: [rocsparse_matrix_file_rocalution]
|
|
spmm_alg: [rocsparse_spmm_alg_bsr]
|
|
orderB: [rocsparse_order_column]
|
|
orderC: [rocsparse_order_column]
|
|
filename: [Chevron3]
|
|
|
|
- name: spmm_bsr_file
|
|
category: nightly
|
|
function: spmm_bsr
|
|
indextype: *i32_i64
|
|
precision: *double_only_precisions_complex
|
|
M: 1
|
|
N: [12]
|
|
K: 1
|
|
block_dim: [9]
|
|
alpha_beta: *alpha_beta_range_nightly
|
|
transA: [rocsparse_operation_none]
|
|
transB: [rocsparse_operation_transpose]
|
|
baseA: [rocsparse_index_base_zero]
|
|
direction: [rocsparse_direction_row]
|
|
matrix: [rocsparse_matrix_file_rocalution]
|
|
spmm_alg: [rocsparse_spmm_alg_bsr]
|
|
orderB: [rocsparse_order_column]
|
|
orderC: [rocsparse_order_column]
|
|
filename: [Chevron4]
|
|
device_memory_gb: 18
|
|
|
|
- name: spmm_bsr_file
|
|
category: nightly
|
|
function: spmm_bsr
|
|
indextype: *i32_i64
|
|
precision: *single_double_precisions_complex
|
|
M: 1
|
|
N: [5]
|
|
K: 1
|
|
block_dim: [5]
|
|
alpha_beta: *alpha_beta_range_nightly
|
|
transA: [rocsparse_operation_none]
|
|
transB: [rocsparse_operation_transpose]
|
|
baseA: [rocsparse_index_base_zero]
|
|
direction: [rocsparse_direction_column]
|
|
matrix: [rocsparse_matrix_file_rocalution]
|
|
spmm_alg: [rocsparse_spmm_alg_bsr]
|
|
orderB: [rocsparse_order_column]
|
|
orderC: [rocsparse_order_row]
|
|
filename: [Chevron4]
|
|
|
|
- name: spmm_bsr_file
|
|
category: nightly
|
|
function: spmm_bsr
|
|
indextype: *i32_i64
|
|
precision: *double_only_precisions
|
|
M: 1
|
|
N: [52]
|
|
K: 1
|
|
block_dim: [6]
|
|
tolm: 4
|
|
alpha_beta: *alpha_beta_range_nightly
|
|
transA: [rocsparse_operation_none]
|
|
transB: [rocsparse_operation_none]
|
|
baseA: [rocsparse_index_base_one]
|
|
direction: [rocsparse_direction_row]
|
|
matrix: [rocsparse_matrix_file_rocalution]
|
|
spmm_alg: [rocsparse_spmm_alg_bsr]
|
|
orderB: [rocsparse_order_row]
|
|
orderC: [rocsparse_order_row]
|
|
filename: [shipsec1]
|
|
|
|
- name: spmm_bsr
|
|
category: nightly
|
|
function: spmm_bsr
|
|
indextype: *i32
|
|
precision: *float16_float16_float32_float32_abct_precision
|
|
M: [8472]
|
|
N: [29, 39]
|
|
K: [12943]
|
|
alpha_beta: *alpha_beta_range_nightly
|
|
transA: [rocsparse_operation_none]
|
|
transB: [rocsparse_operation_none]
|
|
baseA: [rocsparse_index_base_zero]
|
|
matrix: [rocsparse_matrix_random]
|
|
spmm_alg: [rocsparse_spmm_alg_bsr]
|
|
orderB: [rocsparse_order_column]
|
|
orderC: [rocsparse_order_column]
|