derek.holloway
7502bf64a4
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44 lines
1.5 KiB
ArmAsm
44 lines
1.5 KiB
ArmAsm
# RUN: %stinkytofu-opt --arch gfx1250 %s --LongBranchLoweringPass --from-label region_begin --to-label region_end --emit-asm
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#
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# Long-branch idiom round-trip:
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#
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# LongBranchLoweringPass recognizes the rocisa long-branch sequence
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#
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# s_getpc_b64 s[D:D+1]
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# s_add_i32 sX, LBL, 4
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# s_add_u32 sD, sD, sX
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# s_addc_u32 sD+1, sD+1, 0
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# s_setpc_b64 s[D:D+1]
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#
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# and stamps a LabelData{LBL} modifier on the terminating s_setpc_b64 so
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# CFGBuilder can wire a normal direct-branch edge.
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#
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# The pass only attaches metadata, it does NOT rewrite the instructions.
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# So the round-tripped assembly must:
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# 1. Preserve every instruction of the idiom (no DCE; no rewriting).
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# 2. Preserve the original operand spelling (label name + literal 4).
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# 3. Still terminate with s_setpc_b64 s[62:63].
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#
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# CHECK: region_begin
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# CHECK: s_getpc_b64 s[62:63]
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# CHECK: s_add_i32 s64, label_PrefetchEnd, 4
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# CHECK: s_add_u32 s62, s62, s64
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# CHECK: s_addc_u32 s63, s63, 0
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# CHECK: s_setpc_b64 s[62:63]
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# CHECK: label_PrefetchEnd
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# CHECK: region_end
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.amdgcn_target "amdgcn-amd-amdhsa--gfx1250"
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.text
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region_begin:
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s_getpc_b64 s[62:63] // addr of next instr
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s_add_i32 s64, label_PrefetchEnd, 4 // target branch offset
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s_add_u32 s62, s62, s64 // add target branch offset
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s_addc_u32 s63, s63, 0 // add high and carry
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s_setpc_b64 s[62:63] // branch to label_PrefetchEnd
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label_PrefetchEnd:
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s_nop 0
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region_end:
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s_endpgm
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