derek.holloway
7502bf64a4
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40 lines
1.9 KiB
ArmAsm
40 lines
1.9 KiB
ArmAsm
# RUN: %stinkytofu-opt --arch gfx1250 %s --StinkyBuildImplicitDependencyPass --StinkyDAGSchedulerPass --emit-asm --from-label token_start --to-label token_end
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#
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# Two independent memory-token groups annotated via "// st.token:N" comments in
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# raw assembly. The assembler ignores the comments; StinkyTofu reads them to
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# build use-def chains through LDS pseudo-registers.
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#
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# Group 0: ds_load → signal → wait → ds_load (post-barrier)
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# Group 1: ds_load → signal → wait → ds_load (post-barrier)
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#
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# After DAG scheduling the relative ordering within each group must be preserved:
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# - each group's pre-barrier ds_load must precede its signal
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# - signal must precede wait
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# - wait must precede post-barrier ds_load
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#
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# Group 1 signal/wait are before group 0 signal/wait in the source; the scheduler
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# must not let group 0's wait slip past group 1's post-barrier load.
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#
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# Pre-barrier loads appear before signals (within-group ordering preserved)
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# CHECK: ds_load_b128 v[0:3], v16
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# CHECK: ds_load_b128 v[4:7], v20
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# Both signals appear (one per group, scheduler may interleave)
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# CHECK-COUNT-2: s_barrier_signal
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# Both waits appear
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# CHECK-COUNT-2: s_barrier_wait
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# Post-barrier loads appear somewhere after the first wait (exact interleaving is scheduler-chosen)
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# CHECK-DAG: ds_load_b128 v[8:11], v24
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# CHECK-DAG: ds_load_b128 v[12:15], v28
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token_start:
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ds_load_b128 v[0:3], v16 offset:0 // st.token:0 pre-barrier load, group 0
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ds_load_b128 v[4:7], v20 offset:0 // st.token:1 pre-barrier load, group 1
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v_wmma_f32_16x16x32_bf16 a[0:7], v[0:7], v[0:7], a[0:7]
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s_barrier_signal -1 // st.token:1
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s_barrier_signal -1 // st.token:0
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s_barrier_wait -1 // st.token:1
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s_barrier_wait -1 // st.token:0
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ds_load_b128 v[8:11], v24 offset:0 // st.token:0 post-barrier load, group 0
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ds_load_b128 v[12:15], v28 offset:0 // st.token:1 post-barrier load, group 1
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token_end:
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