derek.holloway
7502bf64a4
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40 lines
1.3 KiB
ArmAsm
40 lines
1.3 KiB
ArmAsm
# RUN: %stinkytofu-opt --arch gfx1250 %s --vgpr-msb-mode=msb16 --RaiseVgprMsbPass --InsertVgprMsbPass --from-label label_start --to-label label_end --emit-asm
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#
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# Round-trip through RaiseVgprMsbPass + InsertVgprMsbPass on a kernel that
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# uses VGPRs above index 255. Each such operand requires an s_set_vgpr_msb
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# state instruction to select the upper index bits for the relevant field
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# (src0/src1/src2/dst). Raise dissolves the state into per-operand full
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# indices; Insert restores the state instructions and re-encodes the
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# operands back to byte form `v[fullIdx - msb*256]`.
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#
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# The input exercises three state values (1, then 2, then reset to 0) so
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# the test fails if Insert miscounts, omits a state change, or emits the
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# operands without the byte-form offset.
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# CHECK-LABEL: label_start:
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# CHECK: s_set_vgpr_msb 1
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# CHECK: v_mov_b32 v0, v[257-256]
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# CHECK: s_set_vgpr_msb 258
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# CHECK: v_mov_b32 v3, v[516-512]
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# CHECK: s_set_vgpr_msb 512
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# CHECK: v_mov_b32 v0, v1
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# CHECK-LABEL: label_end:
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.amdgcn_target "amdgcn-amd-amdhsa--gfx1250"
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.text
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.globl test_msb
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.p2align 8
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.type test_msb,@function
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.set vgprHi1, 257
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.set vgprHi2, 516
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test_msb:
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label_start:
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s_set_vgpr_msb 1
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v_mov_b32 v0, v[vgprHi1-256]
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s_set_vgpr_msb 2
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v_mov_b32 v3, v[vgprHi2-512]
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s_set_vgpr_msb 0
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v_mov_b32 v0, v1
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label_end:
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s_endpgm
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