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TheRock/rocm-systems/projects/rocprofiler-systems/external/dyninst/instructionAPI/ISA_ps/ldtrsw
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derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

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##ldtrsw_execute
bits(64) address;
bits(datasize) data;
boolean wb_unknown = FALSE;
boolean rt_unknown = FALSE;
if memop == MemOp_LOAD && wback && n == t && n != 31 then
case c of
end
if memop == MemOp_STORE && wback && n == t && n != 31 then
case c of
end
if n == 31 then
address = SP[];
else
address = X[n];
end
if ! postindex then
address = address + offset;
end
case memop of
when MemOp_STORE
if rt_unknown then
data = bits(datasize) UNKNOWN;
else
data = X[t];
end
Mem[address, datasize / 8, acctype] = data;
end
when MemOp_LOAD
data = Mem[address, datasize / 8, acctype];
if signed then
X[t] = SignExtend(data, regsize);
else
X[t] = ZeroExtend(data, regsize);
end
end
when MemOp_PREFETCH
Prefetch(address, t<4:0>);
end
if wback then
if wb_unknown then
address = bits(64) UNKNOWN;
elsif postindex then
address = address + offset;
end
if n == 31 then
SP[] = address;
else
X[n] = address;
end
end
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