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959 lines
41 KiB
Python
959 lines
41 KiB
Python
################################################################################
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#
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# Copyright (C) 2022-2026 Advanced Micro Devices, Inc. All rights reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
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# of this software and associated documentation files (the "Software"), to deal
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# in the Software without restriction, including without limitation the rights
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# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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# copies of the Software, and to permit persons to whom the Software is
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# furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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# SOFTWARE.
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#
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################################################################################
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from typing import Dict
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from .Activation import ActivationType
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from . import Hardware
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from . import Properties
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from Tensile.Common import state, state_key_ordering, IsaInfo
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from Tensile.Common.Architectures import gfxToIsa
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from Tensile.Common.DataType import DataType
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from Tensile.Common.GlobalParameters import internalParameters
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from Tensile.SolutionStructs import Solution as OriginalSolution
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from Tensile.SolutionStructs.Problem import getBiasDataTypeListDefault, getGateResidualDataTypeListDefault
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from Tensile.Toolchain.Component import Assembler
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from math import ceil
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MIN_K_FOR_GSU = 32
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@state_key_ordering
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class FreeIndex:
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StateKeys = ['isA', 'i', 'c', 'd']
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def __init__(self, isA, i=None, c=None, d=None):
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self.isA = isA
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self.i = i # index into A or B (depending on isA)
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self.c = c
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self.d = d
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@state_key_ordering
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class BatchIndex:
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StateKeys = ['a', 'b', 'c', 'd']
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def __init__(self, a=None, b=None, c=None, d=None):
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self.a = a
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self.b = b
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self.c = c
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self.d = d
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@state_key_ordering
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class BoundIndex:
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StateKeys = ['a', 'b', 'aMirror', 'bMirror']
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def __init__(self, a=None, b=None, aMirror=False, bMirror=False):
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self.a = a
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self.b = b
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self.aMirror = aMirror
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self.bMirror = bMirror
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class ProblemType:
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StateKeys = ['operationIdentifier', 'transA', 'transB', 'computeInputTypeA', 'computeInputTypeB', 'aType', 'bType', 'cType', 'dType', 'eType', 'computeType',
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'useBeta', 'useBias', 'biasSrcWhiteList', 'useE', 'useGateResidual', 'gateResidualDataTypeWhiteList', 'useScaleAB', 'useScaleCD', 'useScaleAlphaVec', 'biasDataTypeWhiteList',
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'highPrecisionAccumulate', 'useInitialStridesAB', 'useInitialStridesCD', 'stridedBatched', 'groupedGemm',
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'useGradient', 'activationType', 'activationArgLength', 'activationComputeDataType', 'activationNoGuard',
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'sparse', 'f32XdlMathOp', 'supportDeviceUserArguments', 'outputAmaxD', 'swizzleTensorA', 'swizzleTensorB', 'metadataLayout',
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'mxBlockA', 'mxBlockB', 'mxTypeA', 'mxTypeB', 'mxScaleFormat']
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@classmethod
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def FromOriginalState(cls, d):
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indices = [None]*d['TotalIndices']
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freeIndices = []
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batchIndices = []
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boundIndices = []
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for i in d['IndicesSummation']:
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bi = BoundIndex(aMirror=('MirrorDimsA' in d and i in d['MirrorDimsA']),
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bMirror=('MirrorDimsB' in d and i in d['MirrorDimsB']))
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indices[i] = bi
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boundIndices.append(bi)
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for i in range(0,d["NumIndicesC"]):
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if i in d['IndicesBatch']:
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bi = BatchIndex(c=i, d=i)
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indices[i] = bi
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batchIndices.append(bi)
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else:
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assert i in d['IndicesFree']
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if i in d['IndexAssignmentsA']:
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fi = FreeIndex(isA=True, i=d["IndexAssignmentsA"].index(i), c=i, d=i)
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elif i in d['IndexAssignmentsB']:
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fi = FreeIndex(isA=False, i=d["IndexAssignmentsB"].index(i), c=i, d=i)
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else:
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raise RuntimeError("free index %u not in ia or ib"%i)
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indices[i] = fi
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freeIndices.append(fi)
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for ia, ic in enumerate(d['IndexAssignmentsA']):
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indices[ic].a = ia
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for ib, ic in enumerate(d['IndexAssignmentsB']):
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indices[ic].b = ib
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for idx in indices:
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assert idx is not None
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idxState = state(idx)
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for (key, value) in list(idxState.items()):
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assert value is not None
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rv = cls()
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rv.indices = indices
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rv.freeIndices = freeIndices
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rv.batchIndices = batchIndices
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rv.boundIndices = boundIndices
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rv.aDims = len(d['IndexAssignmentsA'])
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rv.bDims = len(d['IndexAssignmentsB'])
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rv.cDims = d['NumIndicesC']
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rv.dDims = rv.cDims
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rv.aConjugate = d['ComplexConjugateA']
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rv.bConjugate = d['ComplexConjugateB']
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srcType = DataType(d['DataType'])
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dstType = DataType(d['DestDataType']) if 'DestDataType' in d else srcType
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computeType = DataType(d['ComputeDataType']) if 'ComputeDataType' in d else dstType
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rv.transA = bool(d['TransposeA'])
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rv.transB = bool(d['TransposeB'])
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if 'MacDataTypeA' in d: #it will either be set as d['MacDataType'] or a specified input
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rv.computeInputTypeA = DataType(d['MacDataTypeA'])
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else:
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rv.computeInputTypeA = srcType
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if 'MacDataTypeB' in d:
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rv.computeInputTypeB = DataType(d['MacDataTypeB'])
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else:
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rv.computeInputTypeB = srcType
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if 'DataTypeA' in d: #it will either be set as d['DataType'] or a specified input
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rv.aType = DataType(d['DataTypeA'])
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else:
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rv.aType = rv.computeInputTypeA
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if 'DataTypeB' in d:
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rv.bType = DataType(d['DataTypeB'])
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else:
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rv.bType = rv.computeInputTypeB
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if rv.aType.isFloat8BFloat8() or rv.bType.isFloat8BFloat8():
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rv.aType = DataType("F8")
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rv.bType = DataType("B8")
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elif rv.aType.isFloat8BFloat8_fnuz() or rv.bType.isFloat8BFloat8_fnuz():
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rv.aType = DataType("F8N")
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rv.bType = DataType("B8N")
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elif rv.aType.isBFloat8Float8() or rv.bType.isBFloat8Float8():
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rv.aType = DataType("B8")
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rv.bType = DataType("F8")
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elif rv.aType.isBFloat8Float8_fnuz() or rv.bType.isBFloat8Float8_fnuz():
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rv.aType = DataType("B8N")
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rv.bType = DataType("F8N")
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if 'DataTypeE' in d:
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rv.eType = DataType(d['DataTypeE'])
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else:
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rv.eType = dstType
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if 'DataTypeAmaxD' in d:
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rv.amaxDType = DataType(d['DataTypeAmaxD'])
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else:
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rv.amaxDType = computeType
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rv.cType = dstType
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rv.dType = dstType
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# we already checked the src/dst/compute types are supported and well-assigned in SolutionStruct
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rv.alphaType = computeType
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rv.betaType = computeType
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rv.computeType = computeType
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rv.highPrecisionAccumulate = False
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if 'HighPrecisionAccumulate' in d:
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rv.highPrecisionAccumulate = d['HighPrecisionAccumulate']
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rv.useInitialStridesAB = False
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if 'UseInitialStridesAB' in d:
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rv.useInitialStridesAB = d['UseInitialStridesAB']
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rv.useInitialStridesCD = False
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if 'UseInitialStridesCD' in d:
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rv.useInitialStridesCD = d['UseInitialStridesCD']
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rv.stridedBatched = True
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if 'StridedBatched' in d:
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rv.stridedBatched = d['StridedBatched']
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rv.groupedGemm = False
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if 'GroupedGemm' in d:
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rv.groupedGemm = d['GroupedGemm']
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rv.setConstStrideA = []
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if 'SetConstStrideA' in d:
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rv.setConstStrideA = d['SetConstStrideA']
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rv.setConstStrideB = []
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if 'SetConstStrideB' in d:
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rv.setConstStrideB = d['SetConstStrideB']
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rv.mirrorDimsA = d['MirrorDimsA'] if 'MirrorDimsA' in d else []
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rv.mirrorDimsB = d['MirrorDimsB'] if 'MirrorDimsB' in d else []
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rv.useBeta = True
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if 'UseBeta' in d:
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rv.useBeta = d['UseBeta']
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rv.useBias = 0
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rv.biasDataTypeWhiteList = []
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rv.biasSrcWhiteList = []
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rv.setConstStrideBias = []
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if 'UseBias' in d:
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rv.useBias = d['UseBias']
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if 'BiasDataTypeList' in d:
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d["BiasDataTypeList"].sort() # Sort to make sure names are unique
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rv.biasDataTypeWhiteList = d['BiasDataTypeList']
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else:
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rv.biasDataTypeWhiteList = getBiasDataTypeListDefault(d)
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if 'BiasSrc' in d:
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m = ["A", "B", "C", "D"]
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rv.biasSrcWhiteList = [m.index(d['BiasSrc'])]
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if 'SetConstStrideBias' in d:
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rv.setConstStrideBias = d['SetConstStrideBias']
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rv.useE = False
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if 'UseE' in d:
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rv.useE = d['UseE']
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rv.useGateResidual = False
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rv.gateResidualDataTypeWhiteList = []
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rv.setConstStrideGate = []
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if 'UseGateResidual' in d:
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rv.useGateResidual = bool(d['UseGateResidual'])
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if 'GateResidualDataTypeList' in d:
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d["GateResidualDataTypeList"].sort() # Sort to make sure names are unique
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rv.gateResidualDataTypeWhiteList = d['GateResidualDataTypeList']
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else:
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rv.gateResidualDataTypeWhiteList = getGateResidualDataTypeListDefault(d)
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if 'SetConstStrideGate' in d:
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rv.setConstStrideGate = d['SetConstStrideGate']
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rv.useGradient = False
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if 'Gradient' in d:
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rv.useGradient = d["Gradient"]
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rv.outputAmaxD = False
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if 'OutputAmaxD' in d:
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rv.outputAmaxD = d['OutputAmaxD']
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rv.useScaleAB = ""
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if 'UseScaleAB' in d:
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rv.useScaleAB = d['UseScaleAB']
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rv.useScaleCD = False
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if 'UseScaleCD' in d:
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rv.useScaleCD = d['UseScaleCD']
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rv.useScaleAlphaVec = 0
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if 'UseScaleAlphaVec' in d:
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rv.useScaleAlphaVec = d['UseScaleAlphaVec']
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rv.batched = d['Batched']
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rv.activationType = ActivationType('none')
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rv.activationArgLength = 0
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if 'ActivationType' in d:
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rv.activationType = ActivationType(d['ActivationType'])
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rv.activationArgLength = len(rv.activationType.getAdditionalArgStringList())
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rv.activationComputeDataType = DataType(d['ActivationComputeDataType'])
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rv.activationNoGuard = False
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if 'ActivationNoGuard' in d:
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rv.activationNoGuard = d["ActivationNoGuard"]
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rv.sparse = 0
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if 'Sparse' in d:
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rv.sparse = int(d['Sparse'])
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rv.f32XdlMathOp = DataType(d['F32XdlMathOp']) if 'F32XdlMathOp' in d else DataType(0)
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rv.supportDeviceUserArguments = False
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if 'SupportUserArgs' in d:
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rv.supportDeviceUserArguments = d['SupportUserArgs']
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rv.swizzleTensorA = d.get('SwizzleTensorA', False)
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rv.swizzleTensorB = d.get('SwizzleTensorB', False)
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rv.mxBlockA = d.get('MXBlockA', 0)
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rv.mxBlockB = d.get('MXBlockB', 0)
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rv.mxTypeA = DataType(d['DataTypeMXSA']) if 'DataTypeMXSA' in d else DataType(0)
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rv.mxTypeB = DataType(d['DataTypeMXSB']) if 'DataTypeMXSB' in d else DataType(0)
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# mxScaleFormat is a Solution-level parameter and is populated by
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# Solution.FromOriginalState, which has access to the parent dict.
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rv.metadataLayout = 0
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if 'MetadataLayout' in d:
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rv.metadataLayout = d['MetadataLayout']
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return rv
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def __init__(self, freeIndices=None, batchIndices=None, boundIndices=None, aDims=None, bDims=None, cDims=None, dDims=None):
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self.freeIndices = freeIndices
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self.batchIndices = batchIndices
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self.boundIndices = boundIndices
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self.aDims = aDims
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self.bDims = bDims
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self.cDims = cDims
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self.dDims = dDims
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@property
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def indexNames(self):
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aNames = ['_'] * self.aDims
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bNames = ['_'] * self.bDims
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cNames = ['_'] * self.cDims
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allIndexNames = 'ijklmnopqrstuvwxyz'
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index = 0
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dNames = list([allIndexNames[index+i] for i in range(self.cDims)])
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index += len(dNames)
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sumNames = list([allIndexNames[index+i] for i in range(len(self.boundIndices))])
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index += len(sumNames)
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for free in self.freeIndices:
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if free.isA:
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aNames[free.i ] = dNames[free.d]
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else:
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bNames[free.i ] = dNames[free.d]
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cNames[free.c] = dNames[free.d]
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for batch in self.batchIndices:
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name = dNames[batch.d]
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aNames[batch.a] = name
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bNames[batch.b] = name
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cNames[batch.c] = name
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for i, bound in enumerate(self.boundIndices):
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name = sumNames[i]
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aNames[bound.a] = name.upper() if bound.aMirror else name
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bNames[bound.b] = name.upper() if bound.bMirror else name
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aNames = ''.join(aNames)
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bNames = ''.join(bNames)
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cNames = ''.join(cNames)
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dNames = ''.join(dNames)
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sumNames = ''.join(sumNames)
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return (aNames, bNames, cNames, dNames, sumNames)
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@property
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def operationIdentifier(self):
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(aNames, bNames, cNames, dNames, sumNames) = self.indexNames
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aOp = 'C' if self.aConjugate else ''
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bOp = 'C' if self.bConjugate else ''
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return '_'.join(['Contraction', sumNames,
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'A' + aNames + aOp,
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'B' + bNames + bOp,
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'C' + cNames,
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'D' + dNames])
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def placeholderStr(self, includeBatch=False, includeOperation=False, includeType=False):
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ret = ""
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if includeOperation:
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ret = self.operationIdentifier
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if not self.useBeta:
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ret += "_Beta0"
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ret += "_StridedBatched{}".format(int(self.stridedBatched))
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if includeType:
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ret += "_Type_{}{}".format(DataType(self.aType).toChar(), DataType(self.cType).toChar())
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if self.highPrecisionAccumulate:
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ret += "_HPA"
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return ret
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def predicates(self, includeBatch=False, includeOperation=False, includeType=False):
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predicates = []
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#if includeBatch and not self.batched:
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# predicates.append(ProblemPredicate("BatchSizeEqual", index=0, value=1))
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if includeOperation:
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predicates.append(ProblemPredicate("OperationIdentifierEqual", value=self.operationIdentifier))
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if not self.useBeta:
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predicates.append(ProblemPredicate("BetaZero"))
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predicates.append(ProblemPredicate("BiasDataTypeWhiteList", value=self.biasDataTypeWhiteList))
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predicates.append(ProblemPredicate("GateResidualDataTypeWhiteList", value=self.gateResidualDataTypeWhiteList))
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predicates.append(ProblemPredicate("BiasSrcWhiteList", value=self.biasSrcWhiteList))
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predicates.append(ProblemPredicate("AmaxDCheck", value=self.outputAmaxD))
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if self.activationType in ['all', 'hipblaslt_all']:
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exportType = ActivationType.Export.GRADONLY if self.useGradient else ActivationType.Export.NORMAL
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supportedBy = ActivationType.SupportedBy.ALL if self.activationType == 'all' else ActivationType.SupportedBy.HIPBLASLT
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enumList = [actEnum.capitalize() for actEnum in ActivationType.getEnumStrList(self.activationComputeDataType, supportedBy, exportType=exportType)]
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|
predicates.append(ProblemPredicate("ActivationEnumWhiteList", value=enumList))
|
|
# predicates.append(ProblemPredicate("UseScaleAlphaVec", value=self.useScaleAlphaVec))
|
|
# predicates.append(ProblemPredicate("GroupedGemm", value=self.groupedGemm))
|
|
|
|
if includeType:
|
|
predicates.append(ProblemPredicate("TypesEqual", value=(self.aType, self.bType, self.cType, self.dType, self.computeInputTypeA, self.computeInputTypeB)))
|
|
predicates.append(ProblemPredicate("HighPrecisionAccumulate", value=self.highPrecisionAccumulate))
|
|
predicates.append(ProblemPredicate("Activation", value=self.activationType))
|
|
predicates.append(ProblemPredicate("ActivationComputeType", value=self.activationComputeDataType))
|
|
predicates.append(ProblemPredicate("ActivationNoGuard", value=self.activationNoGuard))
|
|
predicates.append(ProblemPredicate("UseGradient", value=self.useGradient))
|
|
predicates.append(ProblemPredicate("UseBias", value=self.useBias))
|
|
predicates.append(ProblemPredicate("UseE", value=self.useE))
|
|
predicates.append(ProblemPredicate("UseGateResidual", value=self.useGateResidual))
|
|
predicates.append(ProblemPredicate("DataTypeE", value=self.eType))
|
|
predicates.append(ProblemPredicate("StridedBatched", value=self.stridedBatched))
|
|
predicates.append(ProblemPredicate("GroupedGemm", value=self.groupedGemm))
|
|
predicates.append(ProblemPredicate("UseScaleAB", value=self.useScaleAB))
|
|
predicates.append(ProblemPredicate("UseScaleCD", value=self.useScaleCD))
|
|
predicates.append(ProblemPredicate("UseScaleAlphaVec", value=self.useScaleAlphaVec))
|
|
predicates.append(ProblemPredicate("Sparse", value=self.sparse))
|
|
predicates.append(ProblemPredicate("F32XdlMathOp", value=self.f32XdlMathOp))
|
|
predicates.append(ProblemPredicate("SupportDeviceUserArguments", value=self.supportDeviceUserArguments))
|
|
predicates.append(ProblemPredicate("SwizzleTensorA", value=self.swizzleTensorA))
|
|
predicates.append(ProblemPredicate("SwizzleTensorB", value=self.swizzleTensorB))
|
|
predicates.append(ProblemPredicate("MXBlockA", value=self.mxBlockA))
|
|
if self.mxBlockA:
|
|
predicates.append(ProblemPredicate("DataTypeMXSA", value=self.mxTypeA))
|
|
predicates.append(ProblemPredicate("MXBlockB", value=self.mxBlockB))
|
|
if self.mxBlockB:
|
|
predicates.append(ProblemPredicate("DataTypeMXSB", value=self.mxTypeB))
|
|
return predicates
|
|
|
|
def extractDimPredicate(cls, key, value, predicateName):
|
|
"""
|
|
Extract the predicate for AssertStrideEqual*
|
|
Value is a dictionary
|
|
"""
|
|
predicates = []
|
|
for pos,val in value.items():
|
|
if val != -1:
|
|
predicates.append(cls(predicateName, index=pos, value=val))
|
|
if len(predicates) == 1:
|
|
return predicates[0]
|
|
elif len(predicates) > 1:
|
|
return cls.And(predicates)
|
|
|
|
class TaskPredicate(Properties.Predicate):
|
|
@classmethod
|
|
def FromOriginalKeyPair(cls, pair):
|
|
(key, value) = pair
|
|
if key == "_WorkspaceSizePerElemC" and value > 0:
|
|
return cls("WorkspaceCheck")
|
|
return None
|
|
|
|
@classmethod
|
|
def ExtraPredicates(cls, state):
|
|
rv = []
|
|
|
|
# LaunchLimits predicate checks that launch grid will not overflow hip API limits
|
|
# TODO This predicate could also verify limits on some kernel arguments
|
|
# Stream-k kernels currently do not need limit check since launch grid should be limited by the grid model
|
|
if ('StreamK' not in state) or (state['StreamK'] == 0):
|
|
rv += [cls('LaunchLimits')]
|
|
|
|
return rv
|
|
|
|
@classmethod
|
|
def FromOriginalState(cls, d, problemType, morePreds=[]):
|
|
extraPredicates = cls.ExtraPredicates(d)
|
|
predicates = [p for p in map(cls.FromOriginalKeyPair, d.items()) if p is not None] + extraPredicates
|
|
return cls.And(predicates)
|
|
|
|
class ProblemPredicate(Properties.Predicate):
|
|
@classmethod
|
|
def FromOriginalKeyPair(cls, pair):
|
|
(key, value) = pair
|
|
# Arithmetic intensity assertions
|
|
if key == "AssertAIGreaterThanEqual":
|
|
return cls("AIGreaterThanEqual", value=value) if value > 0 else None
|
|
if key == "AssertAILessThanEqual":
|
|
return cls("AILessThanEqual", value=value) if value > 0 else None
|
|
|
|
if key.endswith('Multiple'):
|
|
if value == 1:
|
|
return None
|
|
|
|
if key == "AssertFree0ElementMultiple":
|
|
tag = "Free0SizeMultiple"
|
|
index = 0
|
|
elif key == "AssertFree1ElementMultiple":
|
|
tag = "Free1SizeMultiple"
|
|
index = 0
|
|
elif key == "AssertSummationElementMultiple":
|
|
tag = "BoundSizeMultiple"
|
|
index = -1
|
|
else:
|
|
raise RuntimeError("Unknown Multiple Value: {}".format(key))
|
|
|
|
return cls(tag, index=index, value=value)
|
|
|
|
if key.startswith('Assert'):
|
|
raise RuntimeError("Unknown assertion key: {}".format(key))
|
|
|
|
@classmethod
|
|
def CompoundPredicates(cls, state, problemType):
|
|
rv = []
|
|
|
|
if "BatchSizeEqual" in state:
|
|
rv += [cls('BatchSizeEqual', index=0, value=state["BatchSizeEqual"])]
|
|
|
|
if "SynchronizerSizeCheck" in state:
|
|
if state["SynchronizerSizeCheck"]:
|
|
valuepredicates = []
|
|
valuepredicates.append(state["MacroTile0"])
|
|
valuepredicates.append(state["MacroTile1"])
|
|
if state["EnableMatrixInstruction"]:
|
|
valuepredicates.append(state["MIWaveTile"][0]*state["MIWaveTile"][1])
|
|
else:
|
|
valuepredicates.append(state["ThreadTile0"]*state["ThreadTile1"])
|
|
if state["NumElementsPerBatchStore"] != 0:
|
|
valuepredicates.append(int((state["NumElementsPerThread"])/state["NumElementsPerBatchStore"]))
|
|
else:
|
|
valuepredicates.append(state["NumElementsPerThread"])
|
|
valuepredicates.append(ceil(state["NumThreads"] / state["WavefrontSize"]))
|
|
valuepredicates.append(state["GlobalSplitU"])
|
|
|
|
rv += [cls('SynchronizerSizeCheck', index=0, value=valuepredicates)]
|
|
|
|
if state["InternalSupportParams"]["KernArgsVersion"] >= 1 and \
|
|
not (('StreamK' in state) and (state['StreamK'] > 0)):
|
|
valuepredicates = []
|
|
valuepredicates.append(state["MacroTile0"])
|
|
valuepredicates.append(state["MacroTile1"])
|
|
valuepredicates.append(state["GlobalSplitU"])
|
|
rv += [cls('WorkgroupNumberCheck', index=0, value=valuepredicates)]
|
|
|
|
if not problemType.aType.isInt8x4():
|
|
# calculate the minimum supported free dimension size
|
|
TLUA = state['ProblemType']['TLUA']
|
|
TLUB = state['ProblemType']['TLUB']
|
|
minFree0 = state['GlobalReadVectorWidthA'] if TLUA else 1
|
|
minFree1 = state['GlobalReadVectorWidthB'] if TLUB else 1
|
|
rv += [cls('LeadingFree0SizesGreaterOrEqual', value=minFree0)]
|
|
rv += [cls('LeadingFree1SizesGreaterOrEqual', value=minFree1)]
|
|
|
|
if len(state["PackedC0IndicesX"]) > 1:
|
|
rv += [cls("CDStridesEqual")]
|
|
|
|
if "KernelLanguage" in state:
|
|
rv += [cls("KernelLanguageCompatible", value=state["KernelLanguage"])]
|
|
|
|
if ('GlobalSplitU' in state) and (state['GlobalSplitU'] > 1 or state['GlobalSplitU'] == -1):
|
|
if ('_GlobalAccumulation' not in state) or (state['_GlobalAccumulation'] != 'MultipleBuffer'):
|
|
rv += [cls("DeterministicMode", value = False)]
|
|
|
|
if ('StreamK' in state) and (state['StreamK'] > 0) and ('StreamKAtomic' in state) and (state['StreamKAtomic'] == 1):
|
|
# StreamKAtomic = 1 uses atomic for partial tiles
|
|
rv += [cls("DeterministicMode", value = False)]
|
|
|
|
# if bufferload is performed, we output some predication info for host side,
|
|
# to prevent from some extremely large problems from launching and causing bufferload offset limit < 2^32
|
|
# thoses cases will not satisfy the assertion thus won't use the kernel.
|
|
# See Common.py for more details, we will need four values:
|
|
# TODO - haven't been fully tested for FP16 and BF, need to verify the false-positive
|
|
if 'BufferLoad' in state and state['BufferLoad'] == True:
|
|
TLUA = state['ProblemType']['TLUA']
|
|
TLUB = state['ProblemType']['TLUB']
|
|
MayShiftA = TLUA and state['AssertFree0ElementMultiple'] < state['GlobalReadVectorWidthA']
|
|
MayShiftB = TLUB and state['AssertFree1ElementMultiple'] < state['GlobalReadVectorWidthB']
|
|
subrv={}
|
|
subrv['ShiftPtrElemB'] = state['GlobalReadVectorWidthB'] if MayShiftB else 0
|
|
subrv['ShiftPtrElemA'] = state['GlobalReadVectorWidthA'] if MayShiftA else 0
|
|
subrv['DUorMT1'] = state['DepthU'] if TLUB else state['MacroTile1']
|
|
subrv['DUorMT0'] = state['DepthU'] if TLUA else state['MacroTile0']
|
|
# value is also a dict for better readibility, client side need to handel the serialization
|
|
rv += [cls('BufferLoadOffsetLimitCheck', value=subrv)]
|
|
|
|
# When doing globol write, may need to load matrix C if beta !=0
|
|
if 'BufferLoad' in state and state['BufferLoad'] == True:
|
|
rv += [cls('BufferLoadOffsetLimitCheck_Beta', value=state['MacroTile1'])]
|
|
|
|
# similiar check is applied for bufferstore,
|
|
# for bufferstore offset, test if the bot-right offset < 2^32,
|
|
# it should be StrideA*MT1, so we need to output MT1 and use the StrideA of problem in host-side for predication
|
|
if 'BufferStore' in state and state['BufferStore'] == True:
|
|
rv += [cls('BufferStoreOffsetLimitCheck', value=state['MacroTile1'])]
|
|
|
|
if '_GlobalAccumulation' in state and state['_GlobalAccumulation'] != None and not state["StreamK"]:
|
|
value = MIN_K_FOR_GSU
|
|
rv += [cls('GlobalSplitUCheckMinK', value=[value, state["GlobalSplitU"]])]
|
|
|
|
if ('WorkGroupMappingXCC' in state) and ('WorkGroupMappingXCCGroup' in state):
|
|
rv += [cls("WorkgroupMappingXCCCheck", value=[state['WorkGroupMappingXCC'], state['WorkGroupMappingXCCGroup']])]
|
|
|
|
if state['ProblemType']['SwizzleTensorA']:
|
|
rv += [cls('SwizzleTensorA', value=state['ProblemType']['SwizzleTensorA'])]
|
|
|
|
if state['ProblemType']['SwizzleTensorB']:
|
|
rv += [cls('SwizzleTensorB', value=state['ProblemType']['SwizzleTensorB'])]
|
|
|
|
valuepredicates = []
|
|
valuepredicates.append(state["MacroTile0"])
|
|
valuepredicates.append(state["MacroTile1"])
|
|
valuepredicates.append(state["GlobalSplitU"])
|
|
valuepredicates.append(state["ClusterDim"][0])
|
|
valuepredicates.append(state["ClusterDim"][1])
|
|
rv += [cls('ClusterDimCheck', value=valuepredicates)]
|
|
|
|
return rv
|
|
|
|
@classmethod
|
|
def FromOriginalState(cls, d, problemType, morePreds=[]):
|
|
problemTypePreds = problemType.predicates(True, True, True)
|
|
compoundPreds = cls.CompoundPredicates(d, problemType)
|
|
extraPreds = problemTypePreds + compoundPreds + morePreds
|
|
|
|
predicates = [p for p in map(cls.FromOriginalKeyPair, d.items()) if p is not None] + extraPreds
|
|
return cls.And(predicates)
|
|
|
|
class SizeMapping:
|
|
StateKeys = ['waveNum',
|
|
'workGroup',
|
|
'macroTile',
|
|
'threadTile',
|
|
'matrixInstruction',
|
|
'grvwA',
|
|
'grvwB',
|
|
'gwvwC',
|
|
'gwvwD',
|
|
'depthU',
|
|
'staggerU',
|
|
'staggerUMapping',
|
|
'globalSplitUPGR',
|
|
'globalSplitU',
|
|
'staggerStrideShift',
|
|
'workGroupMapping',
|
|
'packBatchDims',
|
|
'magicDivAlg',
|
|
'streamK',
|
|
'streamKForceDPOnly',
|
|
'streamKAtomic',
|
|
'prefetchAcrossPersistent',
|
|
'sourceKernel',
|
|
'globalAccumulation',
|
|
'adaptiveGemmGSUA',
|
|
'workspaceSizePerElemC',
|
|
'workspaceSizePerElemBias',
|
|
'activationFused',
|
|
'CustomKernelName',
|
|
'workGroupMappingXCC',
|
|
'workGroupMappingXCCGroup',
|
|
'globalSplitUCoalesced',
|
|
'globalSplitUWorkGroupMappingRoundRobin',
|
|
'CUOccupancy',
|
|
'PrefetchGlobalRead',
|
|
'MathClocksUnrolledLoop',
|
|
'synchronizerSizePerWG',
|
|
'nonTemporalA',
|
|
'nonTemporalB',
|
|
'adaptiveGemmNTAB',
|
|
'customMainLoopScheduling',
|
|
'useSubtileImpl',
|
|
'NonTemporalD',
|
|
'WaveSeparateGlobalReadA',
|
|
'WaveSeparateGlobalReadB',
|
|
'UnrollLoopSwapGlobalReadOrder',
|
|
'DirectToVgprA',
|
|
'DirectToVgprB',
|
|
'NumLoadsCoalescedA',
|
|
'NumLoadsCoalescedB',
|
|
'WaveGroup',
|
|
'VectorWidthA',
|
|
'VectorWidthB',
|
|
'LocalSplitU',
|
|
'DirectToLdsA',
|
|
'DirectToLdsB',
|
|
'ExpertSchedulingMode',
|
|
'clusterDim'
|
|
]
|
|
|
|
@classmethod
|
|
def FromOriginalState(cls, d):
|
|
globalAccum = 0
|
|
if d['_GlobalAccumulation'] == 'SingleBuffer':
|
|
globalAccum = 1
|
|
if d['_GlobalAccumulation'] == 'MultipleBuffer':
|
|
globalAccum = 2
|
|
if d['_GlobalAccumulation'] == 'MultipleBufferSingleKernel':
|
|
globalAccum = 3
|
|
if d['_GlobalAccumulation'] == 'PartialsBuffer':
|
|
globalAccum = 4
|
|
pgr = int(d['PrefetchGlobalRead'])
|
|
synchronizerSizePerWG = ceil((d['MIWaveTile'][0]*d['MIWaveTile'][1] if d['EnableMatrixInstruction'] else d['ThreadTile0']*d['ThreadTile1']) \
|
|
* (ceil((d['NumElementsPerThread'])/d['NumElementsPerBatchStore']) if d['NumElementsPerBatchStore'] != 0 else d['NumElementsPerThread']) \
|
|
* ceil(d["NumThreads"] / d["WavefrontSize"]))
|
|
|
|
|
|
# Converts list of list specified in SFCWGM to a 32bit signed integer that is passed to the WGM arg
|
|
# Input: nested list in the form [[GridDimM_L1, GridDimN_L1], [GridDimM_L2, GridDimN_L2]], all values are 8bit unsigned
|
|
# Output: to be stored in 32bit WGM kernel arg - (msb)[GridDimN_L2, GridDimM_L2, GridDimN_L1, GridDimM_L1](lsb)
|
|
def convertSFCWGMListToHex(value):
|
|
import ctypes
|
|
output = 0
|
|
for idx in range(len(value)):
|
|
gridDims = value[idx]
|
|
output = output | gridDims[0] << (16 * idx)
|
|
output = output | (gridDims[1] << (8 + 16 * idx))
|
|
# WGM kernel param is interpreted as int so, 32bit output to 32b int
|
|
return ctypes.c_int(output & 0xFFFFFFFF).value
|
|
|
|
dtva = bool(d['DirectToVgprA'])
|
|
dtvb = bool(d['DirectToVgprB'])
|
|
dtlA = bool(d['DirectToLdsA'])
|
|
dtlB = bool(d['DirectToLdsB'])
|
|
|
|
return cls(waveNum = d['NumThreads'] // d['WavefrontSize'],
|
|
workGroup = d['WorkGroup'],
|
|
macroTile = cls.ReadOriginalMacroTile(d),
|
|
threadTile = d['ThreadTile'],
|
|
matrixInstruction = d['MatrixInstruction'],
|
|
grvwA = d['GlobalReadVectorWidthA'],
|
|
grvwB = d['GlobalReadVectorWidthB'],
|
|
gwvwC = d['StoreVectorWidth'],
|
|
gwvwD = d['StoreVectorWidth'],
|
|
workGroupMapping = d['WorkGroupMapping'] if len(d['SpaceFillingAlgo']) == 0 else convertSFCWGMListToHex(d['SFCWGM']),
|
|
staggerU = d['StaggerU'] if 'StaggerU' in d else 0,
|
|
staggerUMapping = d['StaggerUMapping'] if 'StaggerUMapping' in d else 0,
|
|
depthU = d['DepthU'],
|
|
globalSplitUPGR = internalParameters["GlobalSplitUPGR"],
|
|
globalSplitU = d['GlobalSplitU'],
|
|
staggerStrideShift = d['_staggerStrideShift'] if '_staggerStrideShift' in d else 0,
|
|
packBatchDims = 0,
|
|
streamK = d['StreamK'] if 'StreamK' in d else 0,
|
|
streamKForceDPOnly = d.get('StreamKForceDPOnly', 0),
|
|
streamKAtomic = d['StreamKAtomic'] if 'StreamKAtomic' in d else 0,
|
|
prefetchAcrossPersistent = d.get('PrefetchAcrossPersistent', 0),
|
|
magicDivAlg = d.get('MagicDivAlg', 1),
|
|
sourceKernel = d['KernelLanguage'] == 'Source',
|
|
globalAccumulation = globalAccum,
|
|
adaptiveGemmGSUA = d['AdaptiveGemmGSUA'] if 'AdaptiveGemmGSUA' in d else 0,
|
|
workspaceSizePerElemC = d['_WorkspaceSizePerElemC'],
|
|
workspaceSizePerElemBias = d['_WorkspaceSizePerElemBias'],
|
|
activationFused = d['ActivationFused'],
|
|
CustomKernelName = d['CustomKernelName'],
|
|
workGroupMappingXCC = d['WorkGroupMappingXCC'],
|
|
workGroupMappingXCCGroup = d['WorkGroupMappingXCCGroup'],
|
|
globalSplitUCoalesced = d['GlobalSplitUCoalesced'],
|
|
globalSplitUWorkGroupMappingRoundRobin = d['GlobalSplitUWorkGroupMappingRoundRobin'],
|
|
CUOccupancy = d['CUOccupancy'],
|
|
PrefetchGlobalRead = pgr,
|
|
MathClocksUnrolledLoop = d['MathClocksUnrolledLoop'],
|
|
synchronizerSizePerWG = synchronizerSizePerWG,
|
|
nonTemporalA = d['NonTemporalA'],
|
|
nonTemporalB = d['NonTemporalB'],
|
|
adaptiveGemmNTAB = d['AdaptiveGemmNTAB'] if 'AdaptiveGemmNTAB' in d else 0,
|
|
customMainLoopScheduling = d['UseCustomMainLoopSchedule'],
|
|
useSubtileImpl = bool(d.get('UseSubtileImpl', False)),
|
|
NonTemporalD = d['NonTemporalD'],
|
|
WaveSeparateGlobalReadA = d['WaveSeparateGlobalReadA'],
|
|
WaveSeparateGlobalReadB = d['WaveSeparateGlobalReadB'],
|
|
UnrollLoopSwapGlobalReadOrder = d['UnrollLoopSwapGlobalReadOrder'],
|
|
DirectToVgprA = dtva,
|
|
DirectToVgprB = dtvb,
|
|
NumLoadsCoalescedA = d['NumLoadsCoalescedA'],
|
|
NumLoadsCoalescedB = d['NumLoadsCoalescedB'],
|
|
WaveGroup = d["MIWaveGroup"],
|
|
VectorWidthA = d["VectorWidthA"],
|
|
VectorWidthB = d["VectorWidthB"],
|
|
LocalSplitU = d["LocalSplitU"],
|
|
DirectToLdsA = dtlA,
|
|
DirectToLdsB = dtlB,
|
|
ExpertSchedulingMode = d['ExpertSchedulingMode'],
|
|
clusterDim = d['ClusterDim']
|
|
)
|
|
@classmethod
|
|
def ReadOriginalMacroTile(cls, d):
|
|
rv = [1,1,1]
|
|
rv[0] = d['MacroTile0']
|
|
rv[1] = d['MacroTile1']
|
|
return rv
|
|
|
|
def __init__(self, **kwargs):
|
|
for (key, value) in list(kwargs.items()):
|
|
setattr(self, key, value)
|
|
|
|
class InternalArgsSupport:
|
|
StateKeys = ['version',
|
|
'gsu',
|
|
'wgm',
|
|
'staggerU',
|
|
'useUniversalArgs',
|
|
'useSFC'
|
|
]
|
|
|
|
@classmethod
|
|
def FromOriginalState(cls, d):
|
|
# Set useSFC to True if SpaceFillingAlgo is non-empty, regardless of
|
|
# the explicit InternalSupportParams setting
|
|
useSFC = d['InternalSupportParams']['UseSFC'] or len(d.get('SpaceFillingAlgo', [])) > 0
|
|
return cls(version = d['InternalSupportParams']['KernArgsVersion'],
|
|
gsu = d['InternalSupportParams']['SupportUserGSU'],
|
|
wgm = d['InternalSupportParams']['SupportCustomWGM'],
|
|
staggerU = d['InternalSupportParams']['SupportCustomStaggerU'],
|
|
useUniversalArgs = d['InternalSupportParams']['UseUniversalArgs'],
|
|
useSFC = useSFC)
|
|
|
|
def __init__(self, **kwargs):
|
|
for (key, value) in list(kwargs.items()):
|
|
setattr(self, key, value)
|
|
|
|
class Solution:
|
|
StateKeys = ['name',
|
|
'kernelName',
|
|
'problemType',
|
|
'hardwarePredicate',
|
|
'problemPredicate',
|
|
'taskPredicate',
|
|
'sizeMapping',
|
|
'internalArgsSupport',
|
|
'debugKernel',
|
|
'libraryLogicIndex',
|
|
'index',
|
|
'ideals',
|
|
'linearModel']
|
|
HiddenKeys = ['originalSolution']
|
|
|
|
@classmethod
|
|
def FromSolutionStruct(
|
|
cls,
|
|
solution,
|
|
splitGSU: bool,
|
|
printSolutionRejectionReason: bool,
|
|
printIndexAssignmentInfo: bool,
|
|
assembler: Assembler,
|
|
isaInfoMap: Dict[str, IsaInfo]
|
|
):
|
|
return cls.FromOriginalState(
|
|
solution._state,
|
|
splitGSU,
|
|
printSolutionRejectionReason,
|
|
printIndexAssignmentInfo,
|
|
assembler,
|
|
isaInfoMap,
|
|
solution.srcName,
|
|
raiseProblemTypeOnTypeMismatch=False,
|
|
)
|
|
|
|
@classmethod
|
|
def FromOriginalState(
|
|
cls,
|
|
d,
|
|
splitGSU: bool,
|
|
printSolutionRejectionReason: bool,
|
|
printIndexAssignmentInfo: bool,
|
|
#mink
|
|
assembler,
|
|
isaInfoMap,
|
|
srcName = "",
|
|
deviceInfo=None,
|
|
*,
|
|
raiseProblemTypeOnTypeMismatch: bool = True,
|
|
):
|
|
rv = cls()
|
|
|
|
if 'SolutionNameMin' in d:
|
|
rv.name = d['SolutionNameMin']
|
|
|
|
if 'KernelNameMin' in d:
|
|
rv.kernelName = d['KernelNameMin']
|
|
|
|
rv.problemType = ProblemType.FromOriginalState(d['ProblemType'])
|
|
|
|
# MXScaleFormat is a Solution-level knob (lives in d, not d['ProblemType']),
|
|
# but it describes the in-device MX scale layout the kernel expects, which
|
|
# the host (DataInitialization) needs to know to pick an upload layout.
|
|
# Plumb it onto problemType so the host can read it post-solution-pick.
|
|
rv.problemType.mxScaleFormat = {"NoSwizzle": 0,
|
|
"HostPreSwizzle": 1,
|
|
"InMemorySwizzle": 2}.get(d.get("MXScaleFormat", "NoSwizzle"), 0)
|
|
|
|
rv.problemPredicate = ProblemPredicate.FromOriginalState(d, rv.problemType)
|
|
rv.taskPredicate = TaskPredicate.FromOriginalState(d, rv.problemType)
|
|
|
|
if 'DebugKernel' in d:
|
|
rv.debugKernel = d['DebugKernel']
|
|
|
|
if 'SolutionIndex' in d:
|
|
rv.index = d['SolutionIndex']
|
|
|
|
info = cls.ReadOriginalInfo(d)
|
|
rv.libraryLogicIndex = int(info.get("SolutionIndex", -1))
|
|
|
|
rv.sizeMapping = SizeMapping.FromOriginalState(d)
|
|
|
|
rv.internalArgsSupport = InternalArgsSupport.FromOriginalState(d)
|
|
|
|
if 'Ideals' in d:
|
|
rv.ideals = d['Ideals']
|
|
else:
|
|
rv.ideals = {}
|
|
|
|
if 'LinearModel' in d:
|
|
rv.linearModel = d['LinearModel']
|
|
else:
|
|
rv.linearModel = {}
|
|
|
|
if 'ISA' not in d:
|
|
if d['KernelLanguage'] == 'Assembly':
|
|
d['ISA'] = gfxToIsa(deviceInfo[1])
|
|
|
|
if 'CUCount' not in d:
|
|
d['CUCount'] = None
|
|
|
|
rv.hardwarePredicate = Hardware.HardwarePredicate.FromHardware(
|
|
d['ISA'], d['CUCount'], d.get('DeviceNames', None), logicFile=srcName
|
|
)
|
|
rv.originalSolution = OriginalSolution(
|
|
d,
|
|
splitGSU,
|
|
printSolutionRejectionReason,
|
|
printIndexAssignmentInfo,
|
|
assembler,
|
|
isaInfoMap,
|
|
srcName,
|
|
raiseProblemTypeOnTypeMismatch=raiseProblemTypeOnTypeMismatch,
|
|
)
|
|
rv.srcName = srcName
|
|
|
|
return rv
|
|
|
|
@classmethod
|
|
def ReadOriginalInfo(cls, d):
|
|
return dict([(key, str(value)) for (key, value) in list(d.items()) if key != 'ProblemType'])
|
|
|
|
def __init__(self, **kwargs):
|
|
self.name = None
|
|
self.problemType = None
|
|
self.hardwarePredicate = Hardware.HardwarePredicate('TruePred')
|
|
self.problemPredicate = ProblemPredicate('TruePred')
|
|
self.taskPredicate = TaskPredicate('TruePred')
|
|
self.sizeMapping = None
|
|
self.debugKernel = False
|
|
self.libraryLogicIndex = {}
|
|
self.index = None
|
|
self.ideals = {}
|
|
self.srcName = ""
|
|
|
|
for key, value in kwargs:
|
|
if key not in Solution.StateKeys and key not in Solution.HiddenKeys:
|
|
raise KeyError("{0} is not a property of Solution.".format(key))
|
|
|
|
setattr(self, key, value)
|
|
|
|
def getSolutionKeys(self):
|
|
return self.originalSolution.keys()
|