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StinkyTofu Documentation
For Users
- Global Parameters -- Control StinkyTofu via Tensile's GlobalParameters
- IR Converter -- Convert instruction strings to IRList
- Assembly Emitter -- Convert IR to GPU assembly
- Virtual Registers -- Template-based code generation with register remapping
- Long-Branch CFG Construction -- How
s_setpc_b64long branches get correct CFG edges - StinkyWaitCnt Insertion Pass -- Def-use-chain-driven
s_waitcntinsertion across DS / buffer-load / tensor counters - RemoveInstructionPass -- Strip configurable instruction opcodes from all basic blocks
- Error Codes -- Error code reference
For Developers
- Architecture Overview -- IR levels, build chain, pass pipeline, key passes
- Adding Instructions -- DEF_T system, Logical IR, costs, operand requirements
- Adding a GPU Architecture -- Step-by-step checklist for new architectures
- Adding Peephole Patterns -- Declarative pattern-based optimizations
- Adding Intrinsics -- Define reusable high-level operations
- Pattern Grammar Reference -- Complete syntax for the pattern language
Known Issues
Tools
- stinkytofu-opt -- Standalone IR optimizer for testing passes
- TableGen -- Code generation for instruction tables