derek.holloway
7502bf64a4
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160 lines
6.9 KiB
LLVM
160 lines
6.9 KiB
LLVM
;; Verify that inline assembly is correctly accounted for in the
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;; inst_pref_size calculation. The inst_pref_size is computed via MCExpr
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;; label subtraction (.Lfunc_end - func_sym), giving exact code size.
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;; See inst-prefetch-hint.ll for explanation of the instprefsize expression.
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 < %s | FileCheck --check-prefix=GFX11 %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 < %s | FileCheck --check-prefix=GFX12 %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -filetype=obj < %s -o %t.gfx11.o
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; RUN: llvm-objdump -s -j .rodata %t.gfx11.o | FileCheck --check-prefix=OBJ-GFX11 %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -filetype=obj < %s -o %t.gfx12.o
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; RUN: llvm-objdump -s -j .rodata %t.gfx12.o | FileCheck --check-prefix=OBJ-GFX12 %s
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;; Verify text assembly round-trips through the MC assembler.
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 < %s | llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx1100 -filetype=obj -o %t.rt.gfx11.o
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; RUN: llvm-objdump -s -j .rodata %t.rt.gfx11.o | FileCheck --check-prefix=OBJ-GFX11 %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 < %s | llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx1200 -filetype=obj -o %t.rt.gfx12.o
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; RUN: llvm-objdump -s -j .rodata %t.rt.gfx12.o | FileCheck --check-prefix=OBJ-GFX12 %s
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;; --- .fill directive: .fill 256, 4, 0 => 1024 bytes + 4 (s_endpgm) = 1028 ---
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;; pref_size = divideCeil(1028, 128) = 9
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; GFX11-LABEL: .amdhsa_kernel test_fill
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; GFX11: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end0-test_fill)<<4)&1008)>>4
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; GFX12-LABEL: .amdhsa_kernel test_fill
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; GFX12: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end0-test_fill)<<4)&4080)>>4
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;; Object: kernel descriptor at 0x00, COMPUTE_PGM_RSRC3 at 0x2C:
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;; pref_size=9 -> 9<<4 = 0x90
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; OBJ-GFX11: 0020 {{.*}}90000000
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; OBJ-GFX12: 0020 {{.*}}90000000
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define amdgpu_kernel void @test_fill() {
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call void asm sideeffect ".fill 256, 4, 0", ""()
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ret void
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}
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;; --- .space directive: .space 1024 => 1024 bytes + 4 = 1028 ---
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;; pref_size = 9
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; GFX11-LABEL: .amdhsa_kernel test_space
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; GFX11: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end1-test_space)<<4)&1008)>>4
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; GFX12-LABEL: .amdhsa_kernel test_space
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; GFX12: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end1-test_space)<<4)&4080)>>4
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;; Object: kernel descriptor at 0x40, COMPUTE_PGM_RSRC3 at 0x6C:
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;; pref_size=9 -> 9<<4 = 0x90
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; OBJ-GFX11: 0060 {{.*}}90000000
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; OBJ-GFX12: 0060 {{.*}}90000000
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define amdgpu_kernel void @test_space() {
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call void asm sideeffect ".space 1024", ""()
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ret void
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}
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;; --- Instructions: 32 x s_nop (4 bytes each) = 128 + 4 = 132 ---
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;; pref_size = divideCeil(132, 128) = 2
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; GFX11-LABEL: .amdhsa_kernel test_instructions
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; GFX11: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end2-test_instructions)<<4)&1008)>>4
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; GFX12-LABEL: .amdhsa_kernel test_instructions
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; GFX12: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end2-test_instructions)<<4)&4080)>>4
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;; Object: kernel descriptor at 0x80, COMPUTE_PGM_RSRC3 at 0xAC:
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;; pref_size=2 -> 2<<4 = 0x20
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; OBJ-GFX11: 00a0 {{.*}}20000000
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; OBJ-GFX12: 00a0 {{.*}}20000000
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define amdgpu_kernel void @test_instructions() {
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call void asm sideeffect "s_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0\0As_nop 0", ""()
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ret void
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}
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;; --- Comments emit no bytes: only s_endpgm = 4 bytes ---
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;; pref_size = 1
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; GFX11-LABEL: .amdhsa_kernel test_comments
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; GFX11: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end3-test_comments)<<4)&1008)>>4
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; GFX12-LABEL: .amdhsa_kernel test_comments
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; GFX12: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end3-test_comments)<<4)&4080)>>4
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;; Object: kernel descriptor at 0xC0, COMPUTE_PGM_RSRC3 at 0xEC:
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;; pref_size=1 -> 1<<4 = 0x10
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; OBJ-GFX11: 00e0 {{.*}}10000000
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; OBJ-GFX12: 00e0 {{.*}}10000000
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define amdgpu_kernel void @test_comments() {
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call void asm sideeffect "; comment 1\0A; comment 2\0A; comment 3", ""()
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ret void
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}
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;; --- Empty inline asm: only s_endpgm = 4 bytes ---
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;; pref_size = 1
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; GFX11-LABEL: .amdhsa_kernel test_empty_asm
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; GFX11: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end4-test_empty_asm)<<4)&1008)>>4
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; GFX12-LABEL: .amdhsa_kernel test_empty_asm
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; GFX12: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end4-test_empty_asm)<<4)&4080)>>4
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;; Object: kernel descriptor at 0x100, COMPUTE_PGM_RSRC3 at 0x12C:
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;; pref_size=1 -> 1<<4 = 0x10
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; OBJ-GFX11: 0120 {{.*}}10000000
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; OBJ-GFX12: 0120 {{.*}}10000000
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define amdgpu_kernel void @test_empty_asm() {
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call void asm sideeffect "", ""()
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ret void
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}
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;; --- Multiple inline asm blocks: .fill (512) + .space (512) + s_endpgm (4) = 1028 ---
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;; pref_size = divideCeil(1028, 128) = 9
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; GFX11-LABEL: .amdhsa_kernel test_multiple_asm
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; GFX11: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end5-test_multiple_asm)<<4)&1008)>>4
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; GFX12-LABEL: .amdhsa_kernel test_multiple_asm
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; GFX12: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end5-test_multiple_asm)<<4)&4080)>>4
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;; Object: kernel descriptor at 0x140, COMPUTE_PGM_RSRC3 at 0x16C:
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;; pref_size=9 -> 9<<4 = 0x90
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; OBJ-GFX11: 0160 {{.*}}90000000
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; OBJ-GFX12: 0160 {{.*}}90000000
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define amdgpu_kernel void @test_multiple_asm() {
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call void asm sideeffect ".fill 128, 4, 0", ""()
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call void asm sideeffect ".space 512", ""()
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ret void
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}
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;; --- Large function that exceeds GFX11 6-bit field max (63) ---
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;; .fill 2048, 4, 0 = 8192 bytes + 4 = 8196 bytes
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;; divideCeil(8196, 128) = 65, but GFX11 max = (1<<6)-1 = 63
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;; pref_size should clamp to 63
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; GFX11-LABEL: .amdhsa_kernel test_clamping
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; GFX11: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end6-test_clamping)<<4)&1008)>>4
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; GFX12-LABEL: .amdhsa_kernel test_clamping
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; GFX12: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end6-test_clamping)<<4)&4080)>>4
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;; Object: kernel descriptor at 0x180, COMPUTE_PGM_RSRC3 at 0x1AC:
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;; gfx11: clamped to 63 -> 63<<4 = 0x3F0
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;; gfx12: no clamping, 65 -> 65<<4 = 0x410
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; OBJ-GFX11: 01a0 {{.*}}f0030000
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; OBJ-GFX12: 01a0 {{.*}}10040000
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define amdgpu_kernel void @test_clamping() {
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call void asm sideeffect ".fill 2048, 4, 0", ""()
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ret void
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}
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;; --- Large function that exceeds both GFX11 and GFX12 field max ---
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;; .fill 8192, 4, 0 = 32768 bytes + 4 = 32772 bytes
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;; divideCeil(32772, 128) = 257
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;; GFX11 max = 63, GFX12 max = 255 -> both clamp
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; GFX11-LABEL: .amdhsa_kernel test_clamping_both
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; GFX11: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end7-test_clamping_both)<<4)&1008)>>4
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; GFX12-LABEL: .amdhsa_kernel test_clamping_both
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; GFX12: .amdhsa_inst_pref_size ((instprefsize(.Lfunc_end7-test_clamping_both)<<4)&4080)>>4
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;; Object: kernel descriptor at 0x1C0, COMPUTE_PGM_RSRC3 at 0x1EC:
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;; gfx11: clamped to 63 -> 63<<4 = 0x3F0
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;; gfx12: clamped to 255 -> 255<<4 = 0xFF0
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; OBJ-GFX11: 01e0 {{.*}}f0030000
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; OBJ-GFX12: 01e0 {{.*}}f00f0000
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define amdgpu_kernel void @test_clamping_both() {
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call void asm sideeffect ".fill 8192, 4, 0", ""()
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ret void
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}
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