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128 lines
4.9 KiB
LLVM
128 lines
4.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 < %s | FileCheck --check-prefix=GFX12 %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+cumode < %s | FileCheck --check-prefix=GFX12 %s
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define amdgpu_kernel void @buffer_last_use_load_0(ptr addrspace(7) %in, ptr addrspace(7) %out) {
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; GFX12-LABEL: buffer_last_use_load_0:
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; GFX12: ; %bb.0: ; %entry
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; GFX12-NEXT: s_clause 0x1
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; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
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; GFX12-NEXT: s_load_b32 s11, s[4:5], 0x10
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_mov_b32_e32 v0, s0
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; GFX12-NEXT: s_mov_b32 s8, s1
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; GFX12-NEXT: s_mov_b32 s9, s2
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; GFX12-NEXT: s_mov_b32 s10, s3
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; GFX12-NEXT: s_clause 0x1
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; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
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; GFX12-NEXT: s_load_b32 s7, s[4:5], 0x30
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_mov_b32_e32 v1, s0
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; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_LU
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; GFX12-NEXT: s_mov_b32 s4, s1
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; GFX12-NEXT: s_mov_b32 s5, s2
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; GFX12-NEXT: s_mov_b32 s6, s3
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; GFX12-NEXT: s_wait_loadcnt 0x0
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; GFX12-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen
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; GFX12-NEXT: s_endpgm
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entry:
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%val = load i32, ptr addrspace(7) %in, !amdgpu.last.use !{}
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store i32 %val, ptr addrspace(7) %out
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ret void
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}
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define amdgpu_kernel void @buffer_last_use_load_1(ptr addrspace(7) %in, ptr addrspace(7) %out) {
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; GFX12-LABEL: buffer_last_use_load_1:
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; GFX12: ; %bb.0: ; %entry
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; GFX12-NEXT: s_clause 0x1
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; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
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; GFX12-NEXT: s_load_b32 s11, s[4:5], 0x10
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; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX12-NEXT: v_lshl_add_u32 v0, v0, 2, s0
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; GFX12-NEXT: s_mov_b32 s8, s1
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; GFX12-NEXT: s_mov_b32 s9, s2
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; GFX12-NEXT: s_mov_b32 s10, s3
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; GFX12-NEXT: s_clause 0x1
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; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
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; GFX12-NEXT: s_load_b32 s7, s[4:5], 0x30
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; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_LU
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_mov_b32_e32 v1, s0
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; GFX12-NEXT: s_mov_b32 s4, s1
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; GFX12-NEXT: s_mov_b32 s5, s2
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; GFX12-NEXT: s_mov_b32 s6, s3
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; GFX12-NEXT: s_wait_loadcnt 0x0
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; GFX12-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen
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; GFX12-NEXT: s_endpgm
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%val.gep = getelementptr inbounds i32, ptr addrspace(7) %in, i32 %tid
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%val = load i32, ptr addrspace(7) %val.gep, align 4, !amdgpu.last.use !{}
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store i32 %val, ptr addrspace(7) %out
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ret void
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}
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define amdgpu_kernel void @buffer_last_use_and_volatile_load(ptr addrspace(7) %in, ptr addrspace(7) %out) {
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; GFX12-LABEL: buffer_last_use_and_volatile_load:
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; GFX12: ; %bb.0: ; %entry
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; GFX12-NEXT: s_clause 0x1
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; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
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; GFX12-NEXT: s_load_b32 s11, s[4:5], 0x10
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_mov_b32_e32 v0, s0
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; GFX12-NEXT: s_mov_b32 s8, s1
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; GFX12-NEXT: s_mov_b32 s9, s2
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; GFX12-NEXT: s_mov_b32 s10, s3
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; GFX12-NEXT: s_clause 0x1
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; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
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; GFX12-NEXT: s_load_b32 s7, s[4:5], 0x30
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_mov_b32_e32 v1, s0
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; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_BYPASS scope:SCOPE_SYS
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; GFX12-NEXT: s_wait_loadcnt 0x0
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; GFX12-NEXT: s_mov_b32 s4, s1
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; GFX12-NEXT: s_mov_b32 s5, s2
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; GFX12-NEXT: s_mov_b32 s6, s3
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; GFX12-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen
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; GFX12-NEXT: s_endpgm
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entry:
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%val = load volatile i32, ptr addrspace(7) %in, !amdgpu.last.use !{}
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store i32 %val, ptr addrspace(7) %out
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ret void
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}
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define amdgpu_kernel void @buffer_last_use_and_nontemporal_load(ptr addrspace(7) %in, ptr addrspace(7) %out) {
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; GFX12-LABEL: buffer_last_use_and_nontemporal_load:
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; GFX12: ; %bb.0: ; %entry
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; GFX12-NEXT: s_clause 0x1
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; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
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; GFX12-NEXT: s_load_b32 s11, s[4:5], 0x10
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_mov_b32_e32 v0, s0
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; GFX12-NEXT: s_mov_b32 s8, s1
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; GFX12-NEXT: s_mov_b32 s9, s2
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; GFX12-NEXT: s_mov_b32 s10, s3
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; GFX12-NEXT: s_clause 0x1
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; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
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; GFX12-NEXT: s_load_b32 s7, s[4:5], 0x30
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_mov_b32_e32 v1, s0
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; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_LU
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; GFX12-NEXT: s_mov_b32 s4, s1
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; GFX12-NEXT: s_mov_b32 s5, s2
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; GFX12-NEXT: s_mov_b32 s6, s3
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; GFX12-NEXT: s_wait_loadcnt 0x0
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; GFX12-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen
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; GFX12-NEXT: s_endpgm
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entry:
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%val = load i32, ptr addrspace(7) %in, !amdgpu.last.use !{}, !nontemporal !0
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store i32 %val, ptr addrspace(7) %out
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ret void
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}
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!0 = !{i32 1}
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declare i32 @llvm.amdgcn.workitem.id.x()
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