derek.holloway
7502bf64a4
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203 lines
7.4 KiB
LLVM
203 lines
7.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc -mtriple=amdgcn-amd-amdhsa < %s | FileCheck %s
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define i32 @select.hi32.sgpr.ult(i64 inreg %mask, i32 inreg %a, i32 inreg %b) {
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; CHECK-LABEL: select.hi32.sgpr.ult:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_cmp_lt_u32 s17, 0xaaaaaaaa
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; CHECK-NEXT: s_cselect_b32 s4, s18, s19
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; CHECK-NEXT: v_mov_b32_e32 v0, s4
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%mask.hi.z = icmp ult i64 %mask, u0xaaaaaaaa00000000
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%ret = select i1 %mask.hi.z, i32 %a, i32 %b
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ret i32 %ret
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}
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define i32 @select.hi32.sgpr.uge(i64 inreg %mask, i32 inreg %a, i32 inreg %b) {
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; CHECK-LABEL: select.hi32.sgpr.uge:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_cmp_gt_u32 s17, 0xaaaaaaa9
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; CHECK-NEXT: s_cselect_b32 s4, s18, s19
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; CHECK-NEXT: v_mov_b32_e32 v0, s4
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%mask.hi.nz = icmp uge i64 %mask, u0xaaaaaaaa00000000
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%ret = select i1 %mask.hi.nz, i32 %a, i32 %b
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ret i32 %ret
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}
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define i32 @select.hi32.sgpr.ule(i64 inreg %mask, i32 inreg %a, i32 inreg %b) {
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; CHECK-LABEL: select.hi32.sgpr.ule:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_cmp_lt_u32 s17, 0xaaaaaaab
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; CHECK-NEXT: s_cselect_b32 s4, s18, s19
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; CHECK-NEXT: v_mov_b32_e32 v0, s4
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%mask.hi.z = icmp ule i64 %mask, u0xaaaaaaaaffffffff
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%ret = select i1 %mask.hi.z, i32 %a, i32 %b
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ret i32 %ret
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}
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define i32 @select.hi32.sgpr.ugt(i64 inreg %mask, i32 inreg %a, i32 inreg %b) {
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; CHECK-LABEL: select.hi32.sgpr.ugt:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_cmp_gt_u32 s17, 0xaaaaaaaa
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; CHECK-NEXT: s_cselect_b32 s4, s18, s19
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; CHECK-NEXT: v_mov_b32_e32 v0, s4
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%mask.hi.nz = icmp ugt i64 %mask, u0xaaaaaaaaffffffff
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%ret = select i1 %mask.hi.nz, i32 %a, i32 %b
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ret i32 %ret
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}
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define i32 @select.hi32.vgpr.ult(i64 %mask, i32 %a, i32 %b) {
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; CHECK-LABEL: select.hi32.vgpr.ult:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_mov_b32 s4, 0xaaaaaaaa
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; CHECK-NEXT: v_cmp_gt_u32_e32 vcc, s4, v1
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; CHECK-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%mask.hi.z = icmp ult i64 %mask, u0xaaaaaaaa00000000
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%ret = select i1 %mask.hi.z, i32 %a, i32 %b
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ret i32 %ret
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}
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define i32 @select.hi32.vgpr.uge(i64 %mask, i32 %a, i32 %b) {
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; CHECK-LABEL: select.hi32.vgpr.uge:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_mov_b32 s4, 0xaaaaaaa9
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; CHECK-NEXT: v_cmp_lt_u32_e32 vcc, s4, v1
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; CHECK-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%mask.hi.nz = icmp uge i64 %mask, u0xaaaaaaaa00000000
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%ret = select i1 %mask.hi.nz, i32 %a, i32 %b
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ret i32 %ret
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}
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define i32 @select.hi32.vgpr.ule(i64 %mask, i32 %a, i32 %b) {
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; CHECK-LABEL: select.hi32.vgpr.ule:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_mov_b32 s4, 0xaaaaaaab
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; CHECK-NEXT: v_cmp_gt_u32_e32 vcc, s4, v1
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; CHECK-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%mask.hi.z = icmp ule i64 %mask, u0xaaaaaaaaffffffff
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%ret = select i1 %mask.hi.z, i32 %a, i32 %b
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ret i32 %ret
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}
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define i32 @select.hi32.vgpr.ugt(i64 %mask, i32 %a, i32 %b) {
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; CHECK-LABEL: select.hi32.vgpr.ugt:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_mov_b32 s4, 0xaaaaaaaa
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; CHECK-NEXT: v_cmp_lt_u32_e32 vcc, s4, v1
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; CHECK-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%mask.hi.nz = icmp ugt i64 %mask, u0xaaaaaaaaffffffff
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%ret = select i1 %mask.hi.nz, i32 %a, i32 %b
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ret i32 %ret
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}
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define i32 @select.hi32.sgpr.multiuse(i64 inreg %mask, i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) {
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; CHECK-LABEL: select.hi32.sgpr.multiuse:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_cmp_lt_u32 s17, 0xaaaaaaaa
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; CHECK-NEXT: s_cselect_b32 s4, s18, s19
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; CHECK-NEXT: s_cselect_b32 s5, s20, s21
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; CHECK-NEXT: s_add_i32 s4, s4, s5
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; CHECK-NEXT: v_mov_b32_e32 v0, s4
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%mask.hi.nz = icmp ult i64 %mask, u0xaaaaaaaa00000000
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%ab = select i1 %mask.hi.nz, i32 %a, i32 %b
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%cd = select i1 %mask.hi.nz, i32 %c, i32 %d
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%ret = add i32 %ab, %cd
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ret i32 %ret
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}
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define i32 @select.hi32.vgpr.multiuse(i64 %mask, i32 %a, i32 %b, i32 %c, i32 %d) {
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; CHECK-LABEL: select.hi32.vgpr.multiuse:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_mov_b32 s4, 0xaaaaaaaa
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; CHECK-NEXT: v_cmp_gt_u32_e32 vcc, s4, v1
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; CHECK-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc
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; CHECK-NEXT: v_cndmask_b32_e32 v1, v5, v4, vcc
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; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v1
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%mask.hi.nz = icmp ult i64 %mask, u0xaaaaaaaa00000000
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%ab = select i1 %mask.hi.nz, i32 %a, i32 %b
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%cd = select i1 %mask.hi.nz, i32 %c, i32 %d
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%ret = add i32 %ab, %cd
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ret i32 %ret
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}
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define i32 @select.bad.sgpr.ule(i64 inreg %mask, i32 inreg %a, i32 inreg %b) {
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; CHECK-LABEL: select.bad.sgpr.ule:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: v_mov_b32_e32 v0, 1
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; CHECK-NEXT: v_mov_b32_e32 v1, 0xaaaaaaaa
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; CHECK-NEXT: v_cmp_lt_u64_e32 vcc, s[16:17], v[0:1]
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; CHECK-NEXT: s_and_b64 s[4:5], vcc, exec
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; CHECK-NEXT: s_cselect_b32 s4, s18, s19
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; CHECK-NEXT: v_mov_b32_e32 v0, s4
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%test = icmp ule i64 %mask, u0xaaaaaaaa00000000
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%ret = select i1 %test, i32 %a, i32 %b
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ret i32 %ret
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}
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define i32 @select.bad.sgpr.ult(i64 inreg %mask, i32 inreg %a, i32 inreg %b) {
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; CHECK-LABEL: select.bad.sgpr.ult:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: v_mov_b32_e32 v0, -1
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; CHECK-NEXT: v_mov_b32_e32 v1, 0xaaaaaaaa
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; CHECK-NEXT: v_cmp_lt_u64_e32 vcc, s[16:17], v[0:1]
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; CHECK-NEXT: s_and_b64 s[4:5], vcc, exec
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; CHECK-NEXT: s_cselect_b32 s4, s18, s19
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; CHECK-NEXT: v_mov_b32_e32 v0, s4
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%test = icmp ult i64 %mask, u0xaaaaaaaaffffffff
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%ret = select i1 %test, i32 %a, i32 %b
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ret i32 %ret
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}
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define i32 @select.bad.vgpr.ule(i64 %mask, i32 %a, i32 %b) {
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; CHECK-LABEL: select.bad.vgpr.ule:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_mov_b32 s4, 1
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; CHECK-NEXT: s_mov_b32 s5, 0xaaaaaaaa
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; CHECK-NEXT: v_cmp_gt_u64_e32 vcc, s[4:5], v[0:1]
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; CHECK-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%test = icmp ule i64 %mask, u0xaaaaaaaa00000000
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%ret = select i1 %test, i32 %a, i32 %b
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ret i32 %ret
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}
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define i32 @select.bad.vgpr.ult(i64 %mask, i32 %a, i32 %b) {
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; CHECK-LABEL: select.bad.vgpr.ult:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_mov_b32 s4, -1
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; CHECK-NEXT: s_mov_b32 s5, 0xaaaaaaaa
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; CHECK-NEXT: v_cmp_gt_u64_e32 vcc, s[4:5], v[0:1]
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; CHECK-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%test = icmp ult i64 %mask, u0xaaaaaaaaffffffff
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%ret = select i1 %test, i32 %a, i32 %b
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ret i32 %ret
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}
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