derek.holloway
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71 lines
2.5 KiB
C
71 lines
2.5 KiB
C
/* Lattice Mico32 simulator support code
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Contributed by Jon Beniston <jon@beniston.com>
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Copyright (C) 2009-2024 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* Main header for the LM32 simulator. */
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#ifndef SIM_MAIN_H
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#define SIM_MAIN_H
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#define WITH_SCACHE_PBB 1
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#include "sim-basics.h"
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#include "opcodes/lm32-desc.h"
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#include "opcodes/lm32-opc.h"
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#include "arch.h"
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#include "sim-base.h"
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#include "cgen-sim.h"
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#include "lm32-sim.h"
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struct lm32_sim_cpu
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{
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/* CPU specific parts go here.
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Note that in files that don't need to access these pieces WANT_CPU_FOO
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won't be defined and thus these parts won't appear. This is ok in the
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sense that things work. It is a source of bugs though.
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One has to of course be careful to not take the size of this
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struct and no structure members accessed in non-cpu specific files can
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go after here. Oh for a better language. */
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#if defined (WANT_CPU_LM32BF)
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LM32BF_CPU_DATA cpu_data;
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#endif
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};
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#define LM32_SIM_CPU(cpu) ((struct lm32_sim_cpu *) CPU_ARCH_DATA (cpu))
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/* Misc. */
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/* Catch address exceptions. */
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extern SIM_CORE_SIGNAL_FN lm32_core_signal ATTRIBUTE_NORETURN;
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#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
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lm32_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
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(TRANSFER), (ERROR))
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/* From traps.c. */
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extern USI lm32bf_b_insn (SIM_CPU * current_cpu, USI r0, USI f_r0);
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extern USI lm32bf_divu_insn (SIM_CPU * current_cpu, IADDR pc, USI r0, USI r1, USI r2);
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extern USI lm32bf_modu_insn (SIM_CPU * current_cpu, IADDR pc, USI r0, USI r1, USI r2);
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extern void lm32bf_wcsr_insn (SIM_CPU * current_cpu, USI f_csr, USI r1);
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extern USI lm32bf_break_insn (SIM_CPU * current_cpu, IADDR pc);
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extern USI lm32bf_scall_insn (SIM_CPU * current_cpu, IADDR pc);
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/* From user.c. */
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extern UINT lm32bf_user_insn (SIM_CPU * current_cpu, INT r0, INT r1, UINT imm);
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#endif /* SIM_MAIN_H */
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