derek.holloway
7502bf64a4
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243 lines
8.2 KiB
ArmAsm
243 lines
8.2 KiB
ArmAsm
// COM: HSV-009 / PLAT-205406 regression: this is the RCCL AllReduce crash
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// COM: scenario reduced to comgr lit form. On the 0708 llvmprstack build, RCCL
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// COM: device functions (e.g. runTreeUpDown) contain ds_*_2addr sites that sit
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// COM: far (> s_branch's +-128 KB reach) from the appended trampoline pool in
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// COM: the ~225 MB fatbin. Taking the far path emitted an s_add_pc_i64 long
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// COM: branch. On affected gfx1250 parts, even one execution can corrupt SGPR
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// COM: forwarding in another wave on the same SIMD, causing wrong results,
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// COM: hangs, or a GPU page fault.
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// COM:
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// COM: Fix: use the gfx12 SCC-neutral SGPR-backed set-PC sequence on both
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// COM: edges. Merge adjacent sites and bounded straight-line neighbors when
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// COM: they provide enough source bytes; otherwise short-branch through safe
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// COM: NOP padding.
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// COM: No path emits the broken instruction.
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// RUN: %clang -target amdgcn-amd-amdhsa -mcpu=gfx1250 -nostdlib %s -o %t.elf
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// RUN: hotswap-rewrite %t.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --output %t.out.elf \
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// RUN: | %FileCheck --check-prefix=API %s
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// API: RESULT: SUCCESS
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// RUN: %llvm-objdump -d %t.out.elf | %FileCheck --check-prefix=DISASM %s
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// RUN: %llvm-readelf --notes %t.out.elf | %FileCheck --check-prefix=METADATA %s
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// COM: Case 1 (2-address load, RCCL's pattern).
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// DISASM-NOT: s_add_pc_i64
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// DISASM-LABEL: <test_ds2addr_far_load>:
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// DISASM-NEXT: s_branch
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// COM: Case 2 (adjacent sites coalesced into a set-PC forward gateway).
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// DISASM-LABEL: <test_ds2addr_far_adjacent>:
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// DISASM-NEXT: s_get_pc_i64 s[2:3]
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// DISASM-NEXT: s_add_nc_u64 s[2:3], s[2:3],
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// DISASM-NEXT: s_set_pc_i64 s[2:3]
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// COM: Case 3 (an interior direct-branch target must prevent coalescing).
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// DISASM-LABEL: <test_ds2addr_far_branch_target>:
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// DISASM-NEXT: s_cbranch_scc1
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// DISASM-NEXT: s_branch
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// DISASM-NEXT: s_nop 0
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// DISASM-NEXT: s_branch
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// COM: Case 4 (a direct-call target is also an interior entry point).
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// DISASM-LABEL: <test_ds2addr_far_call_target>:
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// DISASM-NEXT: s_call_i64
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// DISASM-NEXT: s_branch
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// DISASM-NEXT: s_nop 0
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// DISASM-NEXT: s_branch
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// COM: Case 5 (2-address store).
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// DISASM-LABEL: <test_ds2addr_far_store>:
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// DISASM-NEXT: s_branch
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// DISASM-NOT: ds_load_2addr
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// DISASM-NOT: ds_store_2addr
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// DISASM: ds_load_b64 v[8:9], v12 offset:2560
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// DISASM-NEXT: ds_load_b64 v[10:11], v12 offset:3072
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// DISASM-NEXT: s_wait_dscnt 0x0
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// DISASM-NEXT: ds_load_b64 v[12:13], v16 offset:3584
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// DISASM-NEXT: ds_load_b64 v[14:15], v16 offset:4096
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// DISASM-NEXT: s_wait_dscnt 0x0
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// DISASM-NEXT: s_get_pc_i64 s[2:3]
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// DISASM-NEXT: s_add_nc_u64 s[2:3], s[2:3],
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// DISASM-NEXT: s_set_pc_i64 s[2:3]
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// DISASM: ds_store_b32 v2, v0 offset:256
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// DISASM-NEXT: ds_store_b32 v2, v1 offset:768
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// DISASM-NEXT: s_wait_dscnt 0x0
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// DISASM-NEXT: s_wait_dscnt 0x0
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// DISASM-NEXT: s_get_pc_i64 s[2:3]
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// DISASM-NEXT: s_add_nc_u64 s[2:3], s[2:3],
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// DISASM-NEXT: s_set_pc_i64 s[2:3]
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// METADATA: .name: test_ds2addr_far_load
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// METADATA: .sgpr_count: 6
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// METADATA: .name: test_ds2addr_far_store
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// METADATA: .sgpr_count: 6
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// METADATA: .name: test_ds2addr_far_adjacent
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// METADATA: .sgpr_count: 6
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// METADATA: .name: test_ds2addr_far_branch_target
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// METADATA: .sgpr_count: 6
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// METADATA: .name: test_ds2addr_far_call_target
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// METADATA: .sgpr_count: 6
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// COM: Idempotency: rewriting the patched output again is a no-op.
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// RUN: hotswap-rewrite %t.out.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --check-idempotent \
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// RUN: | %FileCheck --check-prefix=IDEM %s
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// IDEM: IDEMPOTENT: YES
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.amdgcn_target "amdgcn-amd-amdhsa--gfx1250"
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.text
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.globl test_ds2addr_far_load
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.p2align 8
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.type test_ds2addr_far_load,@function
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test_ds2addr_far_load:
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ds_load_2addr_stride64_b64 v[0:3], v4 offset0:1 offset1:2
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s_wait_dscnt 0x0
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s_endpgm
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.Ltest_ds2addr_far_load_end:
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.size test_ds2addr_far_load, .Ltest_ds2addr_far_load_end-test_ds2addr_far_load
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.globl test_ds2addr_far_adjacent
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.p2align 8
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.type test_ds2addr_far_adjacent,@function
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test_ds2addr_far_adjacent:
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ds_load_2addr_stride64_b64 v[0:3], v4 offset0:1 offset1:2
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ds_load_2addr_stride64_b64 v[4:7], v8 offset0:3 offset1:4
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ds_load_2addr_stride64_b64 v[8:11], v12 offset0:5 offset1:6
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ds_load_2addr_stride64_b64 v[12:15], v16 offset0:7 offset1:8
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s_wait_dscnt 0x0
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s_endpgm
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.Ltest_ds2addr_far_adjacent_end:
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.size test_ds2addr_far_adjacent, .Ltest_ds2addr_far_adjacent_end-test_ds2addr_far_adjacent
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.globl test_ds2addr_far_branch_target
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.p2align 8
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.type test_ds2addr_far_branch_target,@function
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test_ds2addr_far_branch_target:
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s_cbranch_scc1 .Lsecond_ds2addr
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ds_load_2addr_stride64_b64 v[0:3], v4 offset0:1 offset1:2
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.Lsecond_ds2addr:
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ds_load_2addr_stride64_b64 v[4:7], v8 offset0:3 offset1:4
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s_wait_dscnt 0x0
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s_endpgm
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.Ltest_ds2addr_far_branch_target_end:
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.size test_ds2addr_far_branch_target, .Ltest_ds2addr_far_branch_target_end-test_ds2addr_far_branch_target
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.globl test_ds2addr_far_call_target
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.p2align 8
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.type test_ds2addr_far_call_target,@function
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test_ds2addr_far_call_target:
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s_call_i64 s[0:1], .Lcalled_ds2addr
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ds_load_2addr_stride64_b64 v[0:3], v4 offset0:1 offset1:2
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.Lcalled_ds2addr:
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ds_load_2addr_stride64_b64 v[4:7], v8 offset0:3 offset1:4
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s_wait_dscnt 0x0
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s_endpgm
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.Ltest_ds2addr_far_call_target_end:
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.size test_ds2addr_far_call_target, .Ltest_ds2addr_far_call_target_end-test_ds2addr_far_call_target
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.globl test_ds2addr_far_store
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.p2align 8
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.type test_ds2addr_far_store,@function
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test_ds2addr_far_store:
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ds_store_2addr_stride64_b32 v2, v0, v1 offset0:1 offset1:3
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s_wait_dscnt 0x0
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s_endpgm
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// ~160 KB of non-NOP filler (forms no usable sled) so the appended trampoline
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// pool is beyond s_branch's +-128 KB reach from both kernels above, forcing
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// the far (long-branch) path.
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.rept 40000
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s_mov_b32 s0, s1
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.endr
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.Ltest_ds2addr_far_store_end:
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.size test_ds2addr_far_store, .Ltest_ds2addr_far_store_end-test_ds2addr_far_store
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.rodata
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.p2align 8
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.amdhsa_kernel test_ds2addr_far_load
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.amdhsa_next_free_vgpr 5
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.amdhsa_next_free_sgpr 1
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.end_amdhsa_kernel
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.amdhsa_kernel test_ds2addr_far_store
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.amdhsa_next_free_vgpr 3
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.amdhsa_next_free_sgpr 1
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.end_amdhsa_kernel
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.amdhsa_kernel test_ds2addr_far_adjacent
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.amdhsa_next_free_vgpr 17
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.amdhsa_next_free_sgpr 1
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.end_amdhsa_kernel
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.amdhsa_kernel test_ds2addr_far_branch_target
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.amdhsa_next_free_vgpr 9
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.amdhsa_next_free_sgpr 1
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.end_amdhsa_kernel
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.amdhsa_kernel test_ds2addr_far_call_target
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.amdhsa_next_free_vgpr 9
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.amdhsa_next_free_sgpr 2
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.end_amdhsa_kernel
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.amdgpu_metadata
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amdhsa.version:
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- 3
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- 0
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amdhsa.kernels:
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- .name: test_ds2addr_far_load
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.symbol: test_ds2addr_far_load.kd
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.sgpr_count: 1
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.vgpr_count: 5
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.kernarg_segment_size: 0
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.group_segment_fixed_size: 0
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.private_segment_fixed_size: 0
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.kernarg_segment_align: 8
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.wavefront_size: 64
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.max_flat_workgroup_size: 256
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- .name: test_ds2addr_far_store
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.symbol: test_ds2addr_far_store.kd
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.sgpr_count: 1
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.vgpr_count: 3
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.kernarg_segment_size: 0
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.group_segment_fixed_size: 0
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.private_segment_fixed_size: 0
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.kernarg_segment_align: 8
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.wavefront_size: 64
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.max_flat_workgroup_size: 256
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- .name: test_ds2addr_far_adjacent
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.symbol: test_ds2addr_far_adjacent.kd
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.sgpr_count: 1
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.vgpr_count: 17
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.kernarg_segment_size: 0
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.group_segment_fixed_size: 0
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.private_segment_fixed_size: 0
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.kernarg_segment_align: 8
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.wavefront_size: 64
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.max_flat_workgroup_size: 256
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- .name: test_ds2addr_far_branch_target
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.symbol: test_ds2addr_far_branch_target.kd
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.sgpr_count: 1
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.vgpr_count: 9
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.kernarg_segment_size: 0
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.group_segment_fixed_size: 0
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.private_segment_fixed_size: 0
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.kernarg_segment_align: 8
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.wavefront_size: 64
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.max_flat_workgroup_size: 256
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- .name: test_ds2addr_far_call_target
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.symbol: test_ds2addr_far_call_target.kd
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.sgpr_count: 2
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.vgpr_count: 9
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.kernarg_segment_size: 0
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.group_segment_fixed_size: 0
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.private_segment_fixed_size: 0
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.kernarg_segment_align: 8
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.wavefront_size: 64
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.max_flat_workgroup_size: 256
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.end_amdgpu_metadata
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