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66 lines
2.8 KiB
ArmAsm
66 lines
2.8 KiB
ArmAsm
// COM: Block-16 scaled WMMA (16x16x128) with FP4 matrix data. Unlike FP8, an
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// COM: FP4 K=32 block sits in one lane group and its low/high-16 subblocks
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// COM: split along the VGPR index, so the masked-A copy nulls the opposite
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// COM: subblock's VGPRs (v_mov ..., 0) instead of using a lane mask.
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// RUN: %clang -target amdgcn-amd-amdhsa -mcpu=gfx1250 -nostdlib %s -o %t.elf
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// RUN: hotswap-rewrite %t.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --output %t.out.elf \
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// RUN: | %FileCheck --check-prefix=RESULT %s
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// RESULT: RESULT: SUCCESS
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// RUN: %llvm-objdump -d %t.out.elf | %FileCheck --check-prefix=DISASM %s
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// DISASM-NOT: v_wmma_scale16
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// COM: pass-low keeps the low-16 subblock VGPRs and zeros the high-16, then a
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// COM: block-32 WMMA with the even-byte scale gather writes v[0:7]. FP4 uses a
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// COM: VGPR select, never a lane mask, so no v_cndmask appears in either pass.
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// DISASM-NOT: v_cndmask_b32_e64
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// DISASM: v_mov_b32{{(_e32)?}} v{{[0-9]+}}, 0
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// DISASM: v_wmma_scale_f32_16x16x128_f8f6f4 v[0:7], v[{{[0-9]+}}:{{[0-9]+}}], v[{{[0-9]+}}:{{[0-9]+}}], v[0:7],{{.*}}matrix_a_fmt:MATRIX_FMT_FP4 matrix_b_fmt:MATRIX_FMT_FP4{{[[:space:]]*//}}
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// COM: exactly one gfx1250 hazard v_nop before the pass-high masked-A VALU.
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// DISASM-COUNT-1: v_nop
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// DISASM-NEXT: v_mov_b32{{(_e32)?}} v{{[0-9]+}}, 0
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// DISASM-NOT: v_cndmask_b32_e64
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// COM: pass-high keeps the high-16 subblock VGPRs, odd-byte scale gather,
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// COM: accumulating onto pass-low through v[0:7].
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// DISASM: v_wmma_scale_f32_16x16x128_f8f6f4 v[0:7], v[{{[0-9]+}}:{{[0-9]+}}], v[{{[0-9]+}}:{{[0-9]+}}], v[0:7],{{.*}}matrix_a_fmt:MATRIX_FMT_FP4 matrix_b_fmt:MATRIX_FMT_FP4{{[[:space:]]*//}}
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.amdgcn_target "amdgcn-amd-amdhsa--gfx1250"
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.text
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// --- Scale16 16x16 (block-16) FP4 -> exact VGPR-select K-split ---
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.globl test_wmma_scale16_16x16_fp4
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.p2align 8
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.type test_wmma_scale16_16x16_fp4,@function
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test_wmma_scale16_16x16_fp4:
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v_wmma_scale16_f32_16x16x128_f8f6f4 v[0:7], v[16:23], v[32:39], v[0:7], v[48:49], v[50:51] matrix_a_fmt:MATRIX_FMT_FP4 matrix_b_fmt:MATRIX_FMT_FP4 matrix_a_reuse matrix_b_reuse
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s_endpgm
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.Ltest_wmma_scale16_16x16_fp4_end:
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.size test_wmma_scale16_16x16_fp4, .Ltest_wmma_scale16_16x16_fp4_end-test_wmma_scale16_16x16_fp4
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.rodata
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.p2align 8
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.amdhsa_kernel test_wmma_scale16_16x16_fp4
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.amdhsa_next_free_vgpr 52
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.amdhsa_next_free_sgpr 2
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.amdhsa_wavefront_size32 1
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.end_amdhsa_kernel
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.amdgpu_metadata
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amdhsa.version:
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- 3
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- 0
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amdhsa.kernels:
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- .name: test_wmma_scale16_16x16_fp4
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.symbol: test_wmma_scale16_16x16_fp4.kd
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.sgpr_count: 2
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.vgpr_count: 52
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.kernarg_segment_size: 0
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.group_segment_fixed_size: 0
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.private_segment_fixed_size: 0
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.kernarg_segment_align: 8
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.wavefront_size: 32
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.max_flat_workgroup_size: 256
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.end_amdgpu_metadata
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