derek.holloway
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83 lines
3.5 KiB
YAML
83 lines
3.5 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
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---
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name: test_icmp
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body: |
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bb.0.entry:
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; CHECK-LABEL: name: test_icmp
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; CHECK: [[COPY:%[0-9]+]]:_(f64) = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(f64) = COPY $x0
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(f32) = COPY $w0
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; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(f32) = COPY $w0
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; CHECK-NEXT: [[FCMP:%[0-9]+]]:_(i32) = G_FCMP floatpred(oge), [[COPY]](f64), [[COPY1]]
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; CHECK-NEXT: $w0 = COPY [[FCMP]](i32)
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; CHECK-NEXT: [[FCMP1:%[0-9]+]]:_(i32) = G_FCMP floatpred(uno), [[COPY2]](f32), [[COPY3]]
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; CHECK-NEXT: $w0 = COPY [[FCMP1]](i32)
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%0:_(f64) = COPY $x0
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%1:_(f64) = COPY $x0
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%2:_(f32) = COPY $w0
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%3:_(f32) = COPY $w0
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%4:_(i32) = G_FCMP floatpred(oge), %0(f64), %1
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$w0 = COPY %4(i32)
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%5:_(i32) = G_FCMP floatpred(uno), %2(f32), %3
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$w0 = COPY %5(i32)
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...
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---
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name: legalize_v8s16
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alignment: 4
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legalized: true
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body: |
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bb.0:
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liveins: $q0, $q1
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; CHECK-LABEL: name: legalize_v8s16
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; CHECK: liveins: $q0, $q1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %lhs:_(<8 x f16>) = COPY $q0
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; CHECK-NEXT: %rhs:_(<8 x f16>) = COPY $q1
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(<4 x f16>), [[UV1:%[0-9]+]]:_(<4 x f16>) = G_UNMERGE_VALUES %lhs(<8 x f16>)
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; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[UV]](<4 x f16>)
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; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[UV1]](<4 x f16>)
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; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<4 x f16>), [[UV3:%[0-9]+]]:_(<4 x f16>) = G_UNMERGE_VALUES %rhs(<8 x f16>)
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; CHECK-NEXT: [[FPEXT2:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[UV2]](<4 x f16>)
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; CHECK-NEXT: [[FPEXT3:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[UV3]](<4 x f16>)
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; CHECK-NEXT: [[FCMP:%[0-9]+]]:_(<4 x i32>) = G_FCMP floatpred(oeq), [[FPEXT]](<4 x f32>), [[FPEXT2]]
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; CHECK-NEXT: [[FCMP1:%[0-9]+]]:_(<4 x i32>) = G_FCMP floatpred(oeq), [[FPEXT1]](<4 x f32>), [[FPEXT3]]
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; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<4 x i16>) = G_TRUNC [[FCMP]](<4 x i32>)
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; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<4 x i16>) = G_TRUNC [[FCMP1]](<4 x i32>)
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; CHECK-NEXT: %fcmp:_(<8 x i16>) = G_CONCAT_VECTORS [[TRUNC]](<4 x i16>), [[TRUNC1]](<4 x i16>)
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; CHECK-NEXT: $q0 = COPY %fcmp(<8 x i16>)
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; CHECK-NEXT: RET_ReallyLR implicit $q0
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%lhs:_(<8 x f16>) = COPY $q0
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%rhs:_(<8 x f16>) = COPY $q1
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%fcmp:_(<8 x i16>) = G_FCMP floatpred(oeq), %lhs(<8 x f16>), %rhs
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$q0 = COPY %fcmp(<8 x i16>)
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RET_ReallyLR implicit $q0
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...
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---
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name: legalize_v4s16
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alignment: 4
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legalized: true
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body: |
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bb.0:
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liveins: $d0, $d1
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; CHECK-LABEL: name: legalize_v4s16
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; CHECK: liveins: $d0, $d1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %lhs:_(<4 x f16>) = COPY $d0
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; CHECK-NEXT: %rhs:_(<4 x f16>) = COPY $d1
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; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(<4 x f32>) = G_FPEXT %lhs(<4 x f16>)
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; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(<4 x f32>) = G_FPEXT %rhs(<4 x f16>)
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; CHECK-NEXT: [[FCMP:%[0-9]+]]:_(<4 x i32>) = G_FCMP floatpred(oeq), [[FPEXT]](<4 x f32>), [[FPEXT1]]
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; CHECK-NEXT: %fcmp:_(<4 x i16>) = G_TRUNC [[FCMP]](<4 x i32>)
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; CHECK-NEXT: $d0 = COPY %fcmp(<4 x i16>)
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; CHECK-NEXT: RET_ReallyLR implicit $d0
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%lhs:_(<4 x f16>) = COPY $d0
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%rhs:_(<4 x f16>) = COPY $d1
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%fcmp:_(<4 x i16>) = G_FCMP floatpred(oeq), %lhs(<4 x f16>), %rhs
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$d0 = COPY %fcmp(<4 x i16>)
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RET_ReallyLR implicit $d0
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