derek.holloway
7502bf64a4
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200 lines
11 KiB
LLVM
200 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=aarch64 -mattr=-fullfp16 -stop-after=finalize-isel | FileCheck %s --check-prefixes=CHECK-CVT
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; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 -stop-after=finalize-isel | FileCheck %s --check-prefixes=CHECK-FP16
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; Check that the output instructions have the same fast math flags as the input
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; fadd, even when fadd is promoted to float type.
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define half @normal_fadd(half %x, half %y) {
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; CHECK-CVT-LABEL: name: normal_fadd
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; CHECK-CVT: bb.0.entry:
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; CHECK-CVT-NEXT: liveins: $h0, $h1
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; CHECK-CVT-NEXT: {{ $}}
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; CHECK-CVT-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $h1
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; CHECK-CVT-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $h0
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; CHECK-CVT-NEXT: [[FCVTSHr:%[0-9]+]]:fpr32 = nofpexcept FCVTSHr [[COPY]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTSHr1:%[0-9]+]]:fpr32 = nofpexcept FCVTSHr [[COPY1]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FADDSrr:%[0-9]+]]:fpr32 = nofpexcept FADDSrr killed [[FCVTSHr1]], killed [[FCVTSHr]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTHSr:%[0-9]+]]:fpr16 = nofpexcept FCVTHSr killed [[FADDSrr]], implicit $fpcr
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; CHECK-CVT-NEXT: $h0 = COPY [[FCVTHSr]]
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; CHECK-CVT-NEXT: RET_ReallyLR implicit $h0
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;
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; CHECK-FP16-LABEL: name: normal_fadd
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; CHECK-FP16: bb.0.entry:
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; CHECK-FP16-NEXT: liveins: $h0, $h1
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; CHECK-FP16-NEXT: {{ $}}
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; CHECK-FP16-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $h1
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; CHECK-FP16-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $h0
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; CHECK-FP16-NEXT: [[FADDHrr:%[0-9]+]]:fpr16 = nofpexcept FADDHrr [[COPY1]], [[COPY]], implicit $fpcr
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; CHECK-FP16-NEXT: $h0 = COPY [[FADDHrr]]
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; CHECK-FP16-NEXT: RET_ReallyLR implicit $h0
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entry:
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%add = fadd half %x, %y
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ret half %add
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}
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define half @fast_fadd(half %x, half %y) {
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; CHECK-CVT-LABEL: name: fast_fadd
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; CHECK-CVT: bb.0.entry:
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; CHECK-CVT-NEXT: liveins: $h0, $h1
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; CHECK-CVT-NEXT: {{ $}}
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; CHECK-CVT-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $h1
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; CHECK-CVT-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $h0
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; CHECK-CVT-NEXT: [[FCVTSHr:%[0-9]+]]:fpr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept FCVTSHr [[COPY]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTSHr1:%[0-9]+]]:fpr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept FCVTSHr [[COPY1]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FADDSrr:%[0-9]+]]:fpr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept FADDSrr killed [[FCVTSHr1]], killed [[FCVTSHr]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTHSr:%[0-9]+]]:fpr16 = nnan ninf nsz arcp contract afn reassoc nofpexcept FCVTHSr killed [[FADDSrr]], implicit $fpcr
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; CHECK-CVT-NEXT: $h0 = COPY [[FCVTHSr]]
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; CHECK-CVT-NEXT: RET_ReallyLR implicit $h0
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;
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; CHECK-FP16-LABEL: name: fast_fadd
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; CHECK-FP16: bb.0.entry:
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; CHECK-FP16-NEXT: liveins: $h0, $h1
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; CHECK-FP16-NEXT: {{ $}}
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; CHECK-FP16-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $h1
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; CHECK-FP16-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $h0
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; CHECK-FP16-NEXT: [[FADDHrr:%[0-9]+]]:fpr16 = nnan ninf nsz arcp contract afn reassoc nofpexcept FADDHrr [[COPY1]], [[COPY]], implicit $fpcr
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; CHECK-FP16-NEXT: $h0 = COPY [[FADDHrr]]
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; CHECK-FP16-NEXT: RET_ReallyLR implicit $h0
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entry:
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%add = fadd fast half %x, %y
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ret half %add
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}
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define half @ninf_fadd(half %x, half %y) {
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; CHECK-CVT-LABEL: name: ninf_fadd
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; CHECK-CVT: bb.0.entry:
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; CHECK-CVT-NEXT: liveins: $h0, $h1
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; CHECK-CVT-NEXT: {{ $}}
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; CHECK-CVT-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $h1
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; CHECK-CVT-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $h0
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; CHECK-CVT-NEXT: [[FCVTSHr:%[0-9]+]]:fpr32 = ninf nofpexcept FCVTSHr [[COPY]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTSHr1:%[0-9]+]]:fpr32 = ninf nofpexcept FCVTSHr [[COPY1]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FADDSrr:%[0-9]+]]:fpr32 = ninf nofpexcept FADDSrr killed [[FCVTSHr1]], killed [[FCVTSHr]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTHSr:%[0-9]+]]:fpr16 = ninf nofpexcept FCVTHSr killed [[FADDSrr]], implicit $fpcr
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; CHECK-CVT-NEXT: $h0 = COPY [[FCVTHSr]]
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; CHECK-CVT-NEXT: RET_ReallyLR implicit $h0
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;
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; CHECK-FP16-LABEL: name: ninf_fadd
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; CHECK-FP16: bb.0.entry:
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; CHECK-FP16-NEXT: liveins: $h0, $h1
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; CHECK-FP16-NEXT: {{ $}}
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; CHECK-FP16-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $h1
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; CHECK-FP16-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $h0
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; CHECK-FP16-NEXT: [[FADDHrr:%[0-9]+]]:fpr16 = ninf nofpexcept FADDHrr [[COPY1]], [[COPY]], implicit $fpcr
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; CHECK-FP16-NEXT: $h0 = COPY [[FADDHrr]]
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; CHECK-FP16-NEXT: RET_ReallyLR implicit $h0
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entry:
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%add = fadd ninf half %x, %y
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ret half %add
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}
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; Check that when we have the right fast math flags the converts in between the
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; two fadds are removed.
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define half @normal_fadd_sequence(half %x, half %y, half %z) {
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; CHECK-CVT-LABEL: name: normal_fadd_sequence
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; CHECK-CVT: bb.0.entry:
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; CHECK-CVT-NEXT: liveins: $h0, $h1, $h2
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; CHECK-CVT-NEXT: {{ $}}
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; CHECK-CVT-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $h2
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; CHECK-CVT-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $h1
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; CHECK-CVT-NEXT: [[COPY2:%[0-9]+]]:fpr16 = COPY $h0
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; CHECK-CVT-NEXT: [[FCVTSHr:%[0-9]+]]:fpr32 = nofpexcept FCVTSHr [[COPY1]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTSHr1:%[0-9]+]]:fpr32 = nofpexcept FCVTSHr [[COPY2]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FADDSrr:%[0-9]+]]:fpr32 = nofpexcept FADDSrr killed [[FCVTSHr1]], killed [[FCVTSHr]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTHSr:%[0-9]+]]:fpr16 = nofpexcept FCVTHSr killed [[FADDSrr]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTSHr2:%[0-9]+]]:fpr32 = nofpexcept FCVTSHr killed [[FCVTHSr]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTSHr3:%[0-9]+]]:fpr32 = nofpexcept FCVTSHr [[COPY]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FADDSrr1:%[0-9]+]]:fpr32 = nofpexcept FADDSrr killed [[FCVTSHr2]], killed [[FCVTSHr3]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTHSr1:%[0-9]+]]:fpr16 = nofpexcept FCVTHSr killed [[FADDSrr1]], implicit $fpcr
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; CHECK-CVT-NEXT: $h0 = COPY [[FCVTHSr1]]
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; CHECK-CVT-NEXT: RET_ReallyLR implicit $h0
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;
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; CHECK-FP16-LABEL: name: normal_fadd_sequence
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; CHECK-FP16: bb.0.entry:
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; CHECK-FP16-NEXT: liveins: $h0, $h1, $h2
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; CHECK-FP16-NEXT: {{ $}}
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; CHECK-FP16-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $h2
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; CHECK-FP16-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $h1
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; CHECK-FP16-NEXT: [[COPY2:%[0-9]+]]:fpr16 = COPY $h0
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; CHECK-FP16-NEXT: [[FADDHrr:%[0-9]+]]:fpr16 = nofpexcept FADDHrr [[COPY2]], [[COPY1]], implicit $fpcr
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; CHECK-FP16-NEXT: [[FADDHrr1:%[0-9]+]]:fpr16 = nofpexcept FADDHrr killed [[FADDHrr]], [[COPY]], implicit $fpcr
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; CHECK-FP16-NEXT: $h0 = COPY [[FADDHrr1]]
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; CHECK-FP16-NEXT: RET_ReallyLR implicit $h0
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entry:
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%add1 = fadd half %x, %y
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%add2 = fadd half %add1, %z
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ret half %add2
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}
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define half @nnan_ninf_contract_fadd_sequence(half %x, half %y, half %z) {
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; CHECK-CVT-LABEL: name: nnan_ninf_contract_fadd_sequence
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; CHECK-CVT: bb.0.entry:
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; CHECK-CVT-NEXT: liveins: $h0, $h1, $h2
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; CHECK-CVT-NEXT: {{ $}}
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; CHECK-CVT-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $h2
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; CHECK-CVT-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $h1
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; CHECK-CVT-NEXT: [[COPY2:%[0-9]+]]:fpr16 = COPY $h0
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; CHECK-CVT-NEXT: [[FCVTSHr:%[0-9]+]]:fpr32 = nnan ninf contract nofpexcept FCVTSHr [[COPY1]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTSHr1:%[0-9]+]]:fpr32 = nnan ninf contract nofpexcept FCVTSHr [[COPY2]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FADDSrr:%[0-9]+]]:fpr32 = nnan ninf contract nofpexcept FADDSrr killed [[FCVTSHr1]], killed [[FCVTSHr]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTSHr2:%[0-9]+]]:fpr32 = nnan ninf contract nofpexcept FCVTSHr [[COPY]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FADDSrr1:%[0-9]+]]:fpr32 = nnan ninf contract nofpexcept FADDSrr killed [[FADDSrr]], killed [[FCVTSHr2]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTHSr:%[0-9]+]]:fpr16 = nnan ninf contract nofpexcept FCVTHSr killed [[FADDSrr1]], implicit $fpcr
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; CHECK-CVT-NEXT: $h0 = COPY [[FCVTHSr]]
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; CHECK-CVT-NEXT: RET_ReallyLR implicit $h0
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;
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; CHECK-FP16-LABEL: name: nnan_ninf_contract_fadd_sequence
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; CHECK-FP16: bb.0.entry:
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; CHECK-FP16-NEXT: liveins: $h0, $h1, $h2
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; CHECK-FP16-NEXT: {{ $}}
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; CHECK-FP16-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $h2
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; CHECK-FP16-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $h1
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; CHECK-FP16-NEXT: [[COPY2:%[0-9]+]]:fpr16 = COPY $h0
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; CHECK-FP16-NEXT: [[FADDHrr:%[0-9]+]]:fpr16 = nnan ninf contract nofpexcept FADDHrr [[COPY2]], [[COPY1]], implicit $fpcr
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; CHECK-FP16-NEXT: [[FADDHrr1:%[0-9]+]]:fpr16 = nnan ninf contract nofpexcept FADDHrr killed [[FADDHrr]], [[COPY]], implicit $fpcr
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; CHECK-FP16-NEXT: $h0 = COPY [[FADDHrr1]]
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; CHECK-FP16-NEXT: RET_ReallyLR implicit $h0
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entry:
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%add1 = fadd nnan ninf contract half %x, %y
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%add2 = fadd nnan ninf contract half %add1, %z
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ret half %add2
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}
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define half @ninf_fadd_sequence(half %x, half %y, half %z) {
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; CHECK-CVT-LABEL: name: ninf_fadd_sequence
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; CHECK-CVT: bb.0.entry:
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; CHECK-CVT-NEXT: liveins: $h0, $h1, $h2
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; CHECK-CVT-NEXT: {{ $}}
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; CHECK-CVT-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $h2
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; CHECK-CVT-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $h1
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; CHECK-CVT-NEXT: [[COPY2:%[0-9]+]]:fpr16 = COPY $h0
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; CHECK-CVT-NEXT: [[FCVTSHr:%[0-9]+]]:fpr32 = ninf nofpexcept FCVTSHr [[COPY1]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTSHr1:%[0-9]+]]:fpr32 = ninf nofpexcept FCVTSHr [[COPY2]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FADDSrr:%[0-9]+]]:fpr32 = ninf nofpexcept FADDSrr killed [[FCVTSHr1]], killed [[FCVTSHr]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTHSr:%[0-9]+]]:fpr16 = ninf nofpexcept FCVTHSr killed [[FADDSrr]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTSHr2:%[0-9]+]]:fpr32 = ninf nofpexcept FCVTSHr killed [[FCVTHSr]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTSHr3:%[0-9]+]]:fpr32 = ninf nofpexcept FCVTSHr [[COPY]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FADDSrr1:%[0-9]+]]:fpr32 = ninf nofpexcept FADDSrr killed [[FCVTSHr2]], killed [[FCVTSHr3]], implicit $fpcr
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; CHECK-CVT-NEXT: [[FCVTHSr1:%[0-9]+]]:fpr16 = ninf nofpexcept FCVTHSr killed [[FADDSrr1]], implicit $fpcr
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; CHECK-CVT-NEXT: $h0 = COPY [[FCVTHSr1]]
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; CHECK-CVT-NEXT: RET_ReallyLR implicit $h0
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;
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; CHECK-FP16-LABEL: name: ninf_fadd_sequence
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; CHECK-FP16: bb.0.entry:
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; CHECK-FP16-NEXT: liveins: $h0, $h1, $h2
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; CHECK-FP16-NEXT: {{ $}}
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; CHECK-FP16-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $h2
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; CHECK-FP16-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $h1
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; CHECK-FP16-NEXT: [[COPY2:%[0-9]+]]:fpr16 = COPY $h0
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; CHECK-FP16-NEXT: [[FADDHrr:%[0-9]+]]:fpr16 = ninf nofpexcept FADDHrr [[COPY2]], [[COPY1]], implicit $fpcr
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; CHECK-FP16-NEXT: [[FADDHrr1:%[0-9]+]]:fpr16 = ninf nofpexcept FADDHrr killed [[FADDHrr]], [[COPY]], implicit $fpcr
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; CHECK-FP16-NEXT: $h0 = COPY [[FADDHrr1]]
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; CHECK-FP16-NEXT: RET_ReallyLR implicit $h0
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entry:
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%add1 = fadd ninf half %x, %y
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%add2 = fadd ninf half %add1, %z
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ret half %add2
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}
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