derek.holloway
7502bf64a4
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123 lines
4.1 KiB
LLVM
123 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc < %s | FileCheck %s
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; Test case to demonstrate a bug where calls to OUTLINED_FUNCTION_1 are
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; inserted at a point where LR is live.
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64"
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define hidden void @_ZTv0_n24_N2C6D1Ev(ptr %this) minsize sspreq "target-features"="+harden-sls-retbr" {
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; CHECK-LABEL: _ZTv0_n24_N2C6D1Ev:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: sub sp, sp, #32
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; CHECK-NEXT: str x30, [sp, #16] // 8-byte Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset w30, -16
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; CHECK-NEXT: bl OUTLINED_FUNCTION_0
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; CHECK-NEXT: b.ne .LBB0_2
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; CHECK-NEXT: // %bb.1: // %entry
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; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Reload
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; CHECK-NEXT: add x0, x0, x8
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; CHECK-NEXT: add sp, sp, #32
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; CHECK-NEXT: b _ZN2C6D1Ev
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; CHECK-NEXT: dsb sy
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; CHECK-NEXT: isb
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; CHECK-NEXT: .LBB0_2: // %entry
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; CHECK-NEXT: bl __stack_chk_fail
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entry:
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%0 = load ptr, ptr %this, align 8
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%1 = getelementptr inbounds i8, ptr %0, i64 -24
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%2 = load i64, ptr %1, align 8
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%3 = getelementptr inbounds i8, ptr %this, i64 %2
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tail call void @_ZN2C6D1Ev(ptr %3)
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ret void
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}
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;
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define hidden void @_ZTv0_n24_N2C6D0Ev(ptr %this) minsize sspreq "target-features"="+harden-sls-retbr" {
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; CHECK-LABEL: _ZTv0_n24_N2C6D0Ev:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: sub sp, sp, #32
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; CHECK-NEXT: str x30, [sp, #16] // 8-byte Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset w30, -16
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; CHECK-NEXT: bl OUTLINED_FUNCTION_0
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; CHECK-NEXT: b.ne .LBB1_2
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; CHECK-NEXT: // %bb.1: // %entry
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; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Reload
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; CHECK-NEXT: add x0, x0, x8
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; CHECK-NEXT: add sp, sp, #32
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; CHECK-NEXT: b _ZN2C6D0Ev
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; CHECK-NEXT: dsb sy
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; CHECK-NEXT: isb
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; CHECK-NEXT: .LBB1_2: // %entry
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; CHECK-NEXT: bl __stack_chk_fail
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entry:
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%0 = load ptr, ptr %this, align 8
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%1 = getelementptr inbounds i8, ptr %0, i64 -24
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%2 = load i64, ptr %1, align 8
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%3 = getelementptr inbounds i8, ptr %this, i64 %2
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tail call void @_ZN2C6D0Ev(ptr %3)
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ret void
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}
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define hidden void @_ZTv0_n24_N3C10D1Ev(ptr %this) minsize sspreq "target-features"="+harden-sls-retbr" {
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; CHECK-LABEL: _ZTv0_n24_N3C10D1Ev:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: sub sp, sp, #32
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; CHECK-NEXT: str x30, [sp, #16] // 8-byte Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset w30, -16
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; CHECK-NEXT: bl OUTLINED_FUNCTION_0
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; CHECK-NEXT: b.ne .LBB2_2
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; CHECK-NEXT: // %bb.1: // %entry
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; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Reload
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; CHECK-NEXT: add x0, x0, x8
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; CHECK-NEXT: add sp, sp, #32
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; CHECK-NEXT: b _ZN3C10D1Ev
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; CHECK-NEXT: dsb sy
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; CHECK-NEXT: isb
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; CHECK-NEXT: .LBB2_2: // %entry
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; CHECK-NEXT: bl __stack_chk_fail
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entry:
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%0 = load ptr, ptr %this, align 8
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%1 = getelementptr inbounds i8, ptr %0, i64 -24
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%2 = load i64, ptr %1, align 8
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%3 = getelementptr inbounds i8, ptr %this, i64 %2
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tail call void @_ZN3C10D1Ev(ptr %3)
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ret void
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}
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define hidden void @_ZTv0_n24_N3C10D0Ev(ptr %this) minsize sspreq "target-features"="+harden-sls-retbr" {
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; CHECK-LABEL: _ZTv0_n24_N3C10D0Ev:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: sub sp, sp, #32
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; CHECK-NEXT: str x30, [sp, #16] // 8-byte Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset w30, -16
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; CHECK-NEXT: bl OUTLINED_FUNCTION_0
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; CHECK-NEXT: b.ne .LBB3_2
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; CHECK-NEXT: // %bb.1: // %entry
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; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Reload
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; CHECK-NEXT: add x0, x0, x8
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; CHECK-NEXT: add sp, sp, #32
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; CHECK-NEXT: b _ZN3C10D0Ev
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; CHECK-NEXT: dsb sy
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; CHECK-NEXT: isb
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; CHECK-NEXT: .LBB3_2: // %entry
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; CHECK-NEXT: bl __stack_chk_fail
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entry:
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%0 = load ptr, ptr %this, align 8
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%1 = getelementptr inbounds i8, ptr %0, i64 -24
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%2 = load i64, ptr %1, align 8
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%3 = getelementptr inbounds i8, ptr %this, i64 %2
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tail call void @_ZN3C10D0Ev(ptr %3)
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ret void
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}
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declare void @_ZN2C6D1Ev(ptr %this)
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declare void @_ZN3C10D1Ev(ptr %this)
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declare void @_ZN2C6D0Ev(ptr %this)
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declare void @_ZN3C10D0Ev(ptr %this)
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