derek.holloway
7502bf64a4
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50 lines
1.7 KiB
LLVM
50 lines
1.7 KiB
LLVM
; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefix=GCN %s
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; Make sure that m0 is not reinitialized in the loop.
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; GCN-LABEL: {{^}}copy_local_to_global_loop_m0_init:
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; GCN: s_cbranch_scc1 .LBB0_3
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; Initialize in preheader
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; GCN: s_mov_b32 m0, -1
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; GCN: .LBB0_2:
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; GCN-NOT: m0
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; GCN: ds_read_b32
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; GCN-NOT: m0
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; GCN: buffer_store_dword
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; GCN: s_cbranch_scc0 .LBB0_2
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; GCN: .LBB0_3:
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; GCN-NEXT: s_endpgm
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define amdgpu_kernel void @copy_local_to_global_loop_m0_init(ptr addrspace(1) noalias nocapture %out, ptr addrspace(3) noalias nocapture readonly %in, i32 %n) #0 {
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bb:
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%tmp = icmp sgt i32 %n, 0
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br i1 %tmp, label %.lr.ph.preheader, label %._crit_edge
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.lr.ph.preheader: ; preds = %bb
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br label %.lr.ph
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._crit_edge.loopexit: ; preds = %.lr.ph
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br label %._crit_edge
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._crit_edge: ; preds = %._crit_edge.loopexit, %bb
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ret void
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.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader
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%indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]
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%i.01 = phi i32 [ %tmp4, %.lr.ph ], [ 0, %.lr.ph.preheader ]
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%tmp1 = getelementptr inbounds i32, ptr addrspace(3) %in, i32 %i.01
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%tmp2 = load i32, ptr addrspace(3) %tmp1, align 4
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%tmp3 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %indvars.iv
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store i32 %tmp2, ptr addrspace(1) %tmp3, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%tmp4 = add nuw nsw i32 %i.01, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %n
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br i1 %exitcond, label %._crit_edge.loopexit, label %.lr.ph
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}
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attributes #0 = { nounwind }
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