derek.holloway
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66 lines
2.8 KiB
LLVM
66 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck --check-prefix=GCN %s
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; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck --check-prefix=GCN %s
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declare void @llvm.amdgcn.s.buffer.prefetch.data(ptr addrspace(8) %rsrc, i32 %offset, i32 %len)
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define amdgpu_ps void @buffer_prefetch_data_imm_offset_sgpr_len(ptr addrspace(8) inreg %rsrc, i32 inreg %len) {
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; GCN-LABEL: buffer_prefetch_data_imm_offset_sgpr_len:
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; GCN: ; %bb.0: ; %entry
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; GCN-NEXT: s_buffer_prefetch_data s[0:3], 0x80, s4, 0
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; GCN-NEXT: s_endpgm
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entry:
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tail call void @llvm.amdgcn.s.buffer.prefetch.data(ptr addrspace(8) inreg %rsrc, i32 128, i32 %len)
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ret void
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}
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define amdgpu_ps void @buffer_prefetch_data_imm_offset_imm_len(ptr addrspace(8) inreg %rsrc) {
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; GCN-LABEL: buffer_prefetch_data_imm_offset_imm_len:
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; GCN: ; %bb.0: ; %entry
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; GCN-NEXT: s_buffer_prefetch_data s[0:3], 0x0, null, 31
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; GCN-NEXT: s_endpgm
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entry:
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tail call void @llvm.amdgcn.s.buffer.prefetch.data(ptr addrspace(8) inreg %rsrc, i32 0, i32 31)
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ret void
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}
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define amdgpu_ps void @buffer_prefetch_data_imm_offset_vgpr_len(ptr addrspace(8) inreg %rsrc, i32 %len) {
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; GCN-LABEL: buffer_prefetch_data_imm_offset_vgpr_len:
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; GCN: ; %bb.0: ; %entry
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; GCN-NEXT: v_readfirstlane_b32 s4, v0
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; GCN-NEXT: s_buffer_prefetch_data s[0:3], 0x80, s4, 0
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; GCN-NEXT: s_endpgm
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entry:
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tail call void @llvm.amdgcn.s.buffer.prefetch.data(ptr addrspace(8) inreg %rsrc, i32 128, i32 %len)
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ret void
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}
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define amdgpu_ps void @buffer_prefetch_data_vgpr_rsrc_imm_offset_sgpr_len(ptr addrspace(8) %rsrc, i32 inreg %len) {
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; GCN-LABEL: buffer_prefetch_data_vgpr_rsrc_imm_offset_sgpr_len:
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; GCN: ; %bb.0: ; %entry
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; GCN-NEXT: v_readfirstlane_b32 s4, v0
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; GCN-NEXT: v_readfirstlane_b32 s5, v1
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; GCN-NEXT: v_readfirstlane_b32 s6, v2
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; GCN-NEXT: v_readfirstlane_b32 s7, v3
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; GCN-NEXT: s_buffer_prefetch_data s[4:7], 0x80, s0, 0
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; GCN-NEXT: s_endpgm
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entry:
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tail call void @llvm.amdgcn.s.buffer.prefetch.data(ptr addrspace(8) inreg %rsrc, i32 128, i32 %len)
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ret void
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}
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define amdgpu_ps void @buffer_prefetch_data_vgpr_rsrc_imm_offset_vgpr_len(ptr addrspace(8) %rsrc, i32 %len) {
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; GCN-LABEL: buffer_prefetch_data_vgpr_rsrc_imm_offset_vgpr_len:
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; GCN: ; %bb.0: ; %entry
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; GCN-NEXT: v_readfirstlane_b32 s0, v0
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; GCN-NEXT: v_readfirstlane_b32 s1, v1
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; GCN-NEXT: v_readfirstlane_b32 s2, v2
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; GCN-NEXT: v_readfirstlane_b32 s3, v3
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; GCN-NEXT: v_readfirstlane_b32 s4, v4
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; GCN-NEXT: s_buffer_prefetch_data s[0:3], 0x80, s4, 0
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; GCN-NEXT: s_endpgm
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entry:
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tail call void @llvm.amdgcn.s.buffer.prefetch.data(ptr addrspace(8) %rsrc, i32 128, i32 %len)
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ret void
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}
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