derek.holloway
7502bf64a4
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259 lines
8.0 KiB
LLVM
259 lines
8.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=CHECK-T1
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; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2NODSP
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; RUN: llc < %s -mtriple=thumbv7em-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2DSP
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; RUN: llc < %s -mtriple=armv8a-none-eabi | FileCheck %s --check-prefix=CHECK-ARM
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declare i4 @llvm.ssub.sat.i4(i4, i4)
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declare i8 @llvm.ssub.sat.i8(i8, i8)
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declare i16 @llvm.ssub.sat.i16(i16, i16)
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declare i32 @llvm.ssub.sat.i32(i32, i32)
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declare i64 @llvm.ssub.sat.i64(i64, i64)
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define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind {
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; CHECK-T1-LABEL: func32:
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; CHECK-T1: @ %bb.0:
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; CHECK-T1-NEXT: muls r1, r2, r1
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; CHECK-T1-NEXT: subs r0, r0, r1
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; CHECK-T1-NEXT: bvc .LBB0_2
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; CHECK-T1-NEXT: @ %bb.1:
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; CHECK-T1-NEXT: asrs r1, r0, #31
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; CHECK-T1-NEXT: movs r0, #1
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; CHECK-T1-NEXT: lsls r0, r0, #31
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; CHECK-T1-NEXT: eors r0, r1
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; CHECK-T1-NEXT: .LBB0_2:
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; CHECK-T1-NEXT: bx lr
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;
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; CHECK-T2NODSP-LABEL: func32:
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; CHECK-T2NODSP: @ %bb.0:
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; CHECK-T2NODSP-NEXT: mls r3, r1, r2, r0
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; CHECK-T2NODSP-NEXT: mov.w r12, #-2147483648
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; CHECK-T2NODSP-NEXT: muls r1, r2, r1
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; CHECK-T2NODSP-NEXT: cmp r0, r1
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; CHECK-T2NODSP-NEXT: it vs
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; CHECK-T2NODSP-NEXT: eorvs.w r3, r12, r3, asr #31
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; CHECK-T2NODSP-NEXT: mov r0, r3
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; CHECK-T2NODSP-NEXT: bx lr
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;
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; CHECK-T2DSP-LABEL: func32:
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; CHECK-T2DSP: @ %bb.0:
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; CHECK-T2DSP-NEXT: muls r1, r2, r1
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; CHECK-T2DSP-NEXT: qsub r0, r0, r1
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; CHECK-T2DSP-NEXT: bx lr
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;
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; CHECK-ARM-LABEL: func32:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM-NEXT: mul r1, r1, r2
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; CHECK-ARM-NEXT: qsub r0, r0, r1
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; CHECK-ARM-NEXT: bx lr
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%a = mul i32 %y, %z
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%tmp = call i32 @llvm.ssub.sat.i32(i32 %x, i32 %a)
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ret i32 %tmp
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}
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define i64 @func64(i64 %x, i64 %y, i64 %z) nounwind {
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; CHECK-T1-LABEL: func64:
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; CHECK-T1: @ %bb.0:
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; CHECK-T1-NEXT: .save {r4, r5, r7, lr}
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; CHECK-T1-NEXT: push {r4, r5, r7, lr}
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; CHECK-T1-NEXT: mov r3, r0
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; CHECK-T1-NEXT: ldr r4, [sp, #20]
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; CHECK-T1-NEXT: ldr r5, [sp, #16]
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; CHECK-T1-NEXT: subs r0, r0, r5
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; CHECK-T1-NEXT: mov r0, r1
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; CHECK-T1-NEXT: sbcs r0, r4
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; CHECK-T1-NEXT: asrs r0, r0, #31
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; CHECK-T1-NEXT: movs r2, #1
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; CHECK-T1-NEXT: lsls r2, r2, #31
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; CHECK-T1-NEXT: eors r2, r0
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; CHECK-T1-NEXT: subs r3, r3, r5
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; CHECK-T1-NEXT: sbcs r1, r4
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; CHECK-T1-NEXT: bvc .LBB1_3
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; CHECK-T1-NEXT: @ %bb.1:
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; CHECK-T1-NEXT: bvc .LBB1_4
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; CHECK-T1-NEXT: .LBB1_2:
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; CHECK-T1-NEXT: mov r1, r2
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; CHECK-T1-NEXT: pop {r4, r5, r7, pc}
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; CHECK-T1-NEXT: .LBB1_3:
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; CHECK-T1-NEXT: mov r0, r3
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; CHECK-T1-NEXT: bvs .LBB1_2
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; CHECK-T1-NEXT: .LBB1_4:
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; CHECK-T1-NEXT: mov r2, r1
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; CHECK-T1-NEXT: mov r1, r2
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; CHECK-T1-NEXT: pop {r4, r5, r7, pc}
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;
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; CHECK-T2-LABEL: func64:
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; CHECK-T2: @ %bb.0:
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; CHECK-T2-NEXT: ldrd r3, r2, [sp]
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; CHECK-T2-NEXT: subs r0, r0, r3
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; CHECK-T2-NEXT: sbcs r1, r2
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; CHECK-T2-NEXT: it vs
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; CHECK-T2-NEXT: asrvs r0, r1, #31
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; CHECK-T2-NEXT: mov.w r2, #-2147483648
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; CHECK-T2-NEXT: it vs
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; CHECK-T2-NEXT: eorvs.w r1, r2, r1, asr #31
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; CHECK-T2-NEXT: bx lr
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;
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; CHECK-ARM-LABEL: func64:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM-NEXT: ldm sp, {r2, r3}
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; CHECK-ARM-NEXT: subs r0, r0, r2
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; CHECK-ARM-NEXT: mov r2, #-2147483648
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; CHECK-ARM-NEXT: sbcs r1, r1, r3
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; CHECK-ARM-NEXT: asrvs r0, r1, #31
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; CHECK-ARM-NEXT: eorvs r1, r2, r1, asr #31
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; CHECK-ARM-NEXT: bx lr
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%a = mul i64 %y, %z
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%tmp = call i64 @llvm.ssub.sat.i64(i64 %x, i64 %z)
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ret i64 %tmp
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}
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define signext i16 @func16(i16 signext %x, i16 signext %y, i16 signext %z) nounwind {
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; CHECK-T1-LABEL: func16:
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; CHECK-T1: @ %bb.0:
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; CHECK-T1-NEXT: muls r1, r2, r1
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; CHECK-T1-NEXT: sxth r1, r1
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; CHECK-T1-NEXT: subs r0, r0, r1
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; CHECK-T1-NEXT: ldr r1, .LCPI2_0
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; CHECK-T1-NEXT: cmp r0, r1
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; CHECK-T1-NEXT: blt .LBB2_2
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; CHECK-T1-NEXT: @ %bb.1:
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; CHECK-T1-NEXT: mov r0, r1
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; CHECK-T1-NEXT: .LBB2_2:
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; CHECK-T1-NEXT: ldr r1, .LCPI2_1
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; CHECK-T1-NEXT: cmp r0, r1
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; CHECK-T1-NEXT: bgt .LBB2_4
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; CHECK-T1-NEXT: @ %bb.3:
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; CHECK-T1-NEXT: mov r0, r1
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; CHECK-T1-NEXT: .LBB2_4:
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; CHECK-T1-NEXT: bx lr
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; CHECK-T1-NEXT: .p2align 2
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; CHECK-T1-NEXT: @ %bb.5:
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; CHECK-T1-NEXT: .LCPI2_0:
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; CHECK-T1-NEXT: .long 32767 @ 0x7fff
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; CHECK-T1-NEXT: .LCPI2_1:
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; CHECK-T1-NEXT: .long 4294934528 @ 0xffff8000
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;
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; CHECK-T2NODSP-LABEL: func16:
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; CHECK-T2NODSP: @ %bb.0:
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; CHECK-T2NODSP-NEXT: muls r1, r2, r1
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; CHECK-T2NODSP-NEXT: sxth r1, r1
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; CHECK-T2NODSP-NEXT: subs r0, r0, r1
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; CHECK-T2NODSP-NEXT: ssat r0, #16, r0
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; CHECK-T2NODSP-NEXT: bx lr
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;
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; CHECK-T2DSP-LABEL: func16:
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; CHECK-T2DSP: @ %bb.0:
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; CHECK-T2DSP-NEXT: muls r1, r2, r1
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; CHECK-T2DSP-NEXT: qsub16 r0, r0, r1
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; CHECK-T2DSP-NEXT: sxth r0, r0
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; CHECK-T2DSP-NEXT: bx lr
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;
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; CHECK-ARM-LABEL: func16:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM-NEXT: smulbb r1, r1, r2
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; CHECK-ARM-NEXT: qsub16 r0, r0, r1
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; CHECK-ARM-NEXT: sxth r0, r0
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; CHECK-ARM-NEXT: bx lr
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%a = mul i16 %y, %z
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%tmp = call i16 @llvm.ssub.sat.i16(i16 %x, i16 %a)
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ret i16 %tmp
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}
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define signext i8 @func8(i8 signext %x, i8 signext %y, i8 signext %z) nounwind {
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; CHECK-T1-LABEL: func8:
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; CHECK-T1: @ %bb.0:
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; CHECK-T1-NEXT: muls r1, r2, r1
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; CHECK-T1-NEXT: sxtb r1, r1
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; CHECK-T1-NEXT: subs r0, r0, r1
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; CHECK-T1-NEXT: movs r1, #127
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; CHECK-T1-NEXT: cmp r0, #127
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; CHECK-T1-NEXT: blt .LBB3_2
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; CHECK-T1-NEXT: @ %bb.1:
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; CHECK-T1-NEXT: mov r0, r1
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; CHECK-T1-NEXT: .LBB3_2:
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; CHECK-T1-NEXT: mvns r1, r1
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; CHECK-T1-NEXT: cmp r0, r1
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; CHECK-T1-NEXT: bgt .LBB3_4
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; CHECK-T1-NEXT: @ %bb.3:
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; CHECK-T1-NEXT: mov r0, r1
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; CHECK-T1-NEXT: .LBB3_4:
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; CHECK-T1-NEXT: bx lr
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;
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; CHECK-T2NODSP-LABEL: func8:
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; CHECK-T2NODSP: @ %bb.0:
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; CHECK-T2NODSP-NEXT: muls r1, r2, r1
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; CHECK-T2NODSP-NEXT: sxtb r1, r1
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; CHECK-T2NODSP-NEXT: subs r0, r0, r1
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; CHECK-T2NODSP-NEXT: ssat r0, #8, r0
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; CHECK-T2NODSP-NEXT: bx lr
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;
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; CHECK-T2DSP-LABEL: func8:
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; CHECK-T2DSP: @ %bb.0:
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; CHECK-T2DSP-NEXT: muls r1, r2, r1
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; CHECK-T2DSP-NEXT: qsub8 r0, r0, r1
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; CHECK-T2DSP-NEXT: sxtb r0, r0
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; CHECK-T2DSP-NEXT: bx lr
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;
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; CHECK-ARM-LABEL: func8:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM-NEXT: smulbb r1, r1, r2
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; CHECK-ARM-NEXT: qsub8 r0, r0, r1
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; CHECK-ARM-NEXT: sxtb r0, r0
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; CHECK-ARM-NEXT: bx lr
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%a = mul i8 %y, %z
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%tmp = call i8 @llvm.ssub.sat.i8(i8 %x, i8 %a)
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ret i8 %tmp
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}
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define signext i4 @func4(i4 signext %x, i4 signext %y, i4 signext %z) nounwind {
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; CHECK-T1-LABEL: func4:
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; CHECK-T1: @ %bb.0:
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; CHECK-T1-NEXT: muls r1, r2, r1
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; CHECK-T1-NEXT: lsls r1, r1, #28
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; CHECK-T1-NEXT: asrs r1, r1, #28
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; CHECK-T1-NEXT: subs r0, r0, r1
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; CHECK-T1-NEXT: movs r1, #7
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; CHECK-T1-NEXT: cmp r0, #7
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; CHECK-T1-NEXT: blt .LBB4_2
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; CHECK-T1-NEXT: @ %bb.1:
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; CHECK-T1-NEXT: mov r0, r1
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; CHECK-T1-NEXT: .LBB4_2:
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; CHECK-T1-NEXT: mvns r1, r1
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; CHECK-T1-NEXT: cmp r0, r1
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; CHECK-T1-NEXT: bgt .LBB4_4
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; CHECK-T1-NEXT: @ %bb.3:
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; CHECK-T1-NEXT: mov r0, r1
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; CHECK-T1-NEXT: .LBB4_4:
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; CHECK-T1-NEXT: bx lr
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;
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; CHECK-T2NODSP-LABEL: func4:
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; CHECK-T2NODSP: @ %bb.0:
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; CHECK-T2NODSP-NEXT: muls r1, r2, r1
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; CHECK-T2NODSP-NEXT: lsls r1, r1, #28
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; CHECK-T2NODSP-NEXT: sub.w r0, r0, r1, asr #28
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; CHECK-T2NODSP-NEXT: ssat r0, #4, r0
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; CHECK-T2NODSP-NEXT: bx lr
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;
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; CHECK-T2DSP-LABEL: func4:
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; CHECK-T2DSP: @ %bb.0:
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; CHECK-T2DSP-NEXT: muls r1, r2, r1
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; CHECK-T2DSP-NEXT: lsls r0, r0, #28
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; CHECK-T2DSP-NEXT: lsls r1, r1, #28
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; CHECK-T2DSP-NEXT: qsub r0, r0, r1
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; CHECK-T2DSP-NEXT: asrs r0, r0, #28
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; CHECK-T2DSP-NEXT: bx lr
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;
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; CHECK-ARM-LABEL: func4:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM-NEXT: smulbb r1, r1, r2
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; CHECK-ARM-NEXT: lsl r0, r0, #28
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; CHECK-ARM-NEXT: lsl r1, r1, #28
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; CHECK-ARM-NEXT: qsub r0, r0, r1
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; CHECK-ARM-NEXT: asr r0, r0, #28
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; CHECK-ARM-NEXT: bx lr
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%a = mul i4 %y, %z
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%tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %a)
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ret i4 %tmp
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}
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