derek.holloway
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72 lines
2.0 KiB
LLVM
72 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -ppc-asm-full-reg-names | FileCheck %s
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define double @test1(double %a, double %b, double %c, double %d) {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fmul f0, f3, f4
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; CHECK-NEXT: fmul f1, f1, f2
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; CHECK-NEXT: fadd f1, f1, f0
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; CHECK-NEXT: blr
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%tmp2 = fsub double -0.000000e+00, %c
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%tmp4 = fmul double %tmp2, %d
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%tmp7 = fmul double %a, %b
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%tmp9 = fsub double %tmp7, %tmp4
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ret double %tmp9
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}
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declare float @llvm.fmuladd.f32(float, float, float) #4
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define float @fma_fneg_fneg(float %x, float %y, float %z) {
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; CHECK-LABEL: fma_fneg_fneg:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fmadds f1, f1, f2, f3
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; CHECK-NEXT: blr
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%negx = fneg float %x
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%negy = fneg float %y
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%r = call float @llvm.fmuladd.f32(float %negx, float %negy, float %z)
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ret float %r
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}
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define float @fma_fneg_fsub(float %x, float %y0, float %y1, float %z) {
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; CHECK-LABEL: fma_fneg_fsub:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fsubs f0, f3, f2
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; CHECK-NEXT: fmadds f1, f1, f0, f4
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; CHECK-NEXT: blr
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%negx = fneg float %x
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%negy = fsub nsz float %y0, %y1
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%r = call float @llvm.fmuladd.f32(float %negx, float %negy, float %z)
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ret float %r
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}
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; Verify that we didn't hit assertion for this case.
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define double @fneg_no_ice(float %x) {
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; CHECK-LABEL: fneg_no_ice:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lis r3, .LCPI3_0@ha
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; CHECK-NEXT: lfs f0, .LCPI3_0@l(r3)
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; CHECK-NEXT: fsubs f0, f0, f1
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; CHECK-NEXT: fmul f1, f0, f0
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; CHECK-NEXT: fmul f1, f0, f1
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; CHECK-NEXT: blr
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%y = fsub fast float 1.0, %x
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%e = fpext float %y to double
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%e2 = fmul double %e, %e
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%e3 = fmul double %e, %e2
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ret double %e3
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}
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define double @fneg_fmul_const(double %x) {
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; CHECK-LABEL: fneg_fmul_const:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lis r3, .LCPI4_0@ha
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; CHECK-NEXT: lfd f0, .LCPI4_0@l(r3)
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; CHECK-NEXT: fmul f1, f1, f0
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; CHECK-NEXT: blr
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entry:
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%f = fmul double %x, 1.2345
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%s = fneg double %f
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ret double %s
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}
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