derek.holloway
7502bf64a4
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139 lines
4.0 KiB
LLVM
139 lines
4.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=powerpc-ibm-aix-xcoff -verify-machineinstrs < %s -mcpu=pwr7 | FileCheck %s --check-prefix=AIX32
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; RUN: llc -mtriple=powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s -mcpu=pwr7 | FileCheck %s --check-prefix=AIX64
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; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs < %s -mcpu=pwr7 | FileCheck %s --check-prefix=LE
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define ptr @frame_1(i32 signext %num) nounwind {
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; AIX32-LABEL: frame_1:
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; AIX32: # %bb.0: # %entry
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; AIX32-NEXT: stw 31, -4(1)
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; AIX32-NEXT: stwu 1, -48(1)
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; AIX32-NEXT: addi 3, 3, 15
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; AIX32-NEXT: mr 31, 1
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; AIX32-NEXT: addi 4, 31, 48
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; AIX32-NEXT: rlwinm 3, 3, 0, 0, 27
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; AIX32-NEXT: neg 3, 3
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; AIX32-NEXT: stwux 4, 1, 3
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; AIX32-NEXT: addi 3, 1, 32
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; AIX32-NEXT: lbz 4, 0(3)
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; AIX32-NEXT: addi 4, 4, 1
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; AIX32-NEXT: stb 4, 0(3)
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; AIX32-NEXT: lwz 3, 0(1)
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; AIX32-NEXT: lwz 1, 0(1)
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; AIX32-NEXT: lwz 31, -4(1)
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; AIX32-NEXT: blr
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;
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; AIX64-LABEL: frame_1:
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; AIX64: # %bb.0: # %entry
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; AIX64-NEXT: std 31, -8(1)
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; AIX64-NEXT: stdu 1, -64(1)
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; AIX64-NEXT: addi 3, 3, 15
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; AIX64-NEXT: mr 31, 1
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; AIX64-NEXT: addi 4, 31, 64
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; AIX64-NEXT: rldicr 3, 3, 0, 59
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; AIX64-NEXT: neg 3, 3
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; AIX64-NEXT: stdux 4, 1, 3
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; AIX64-NEXT: addi 3, 1, 48
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; AIX64-NEXT: lbz 4, 0(3)
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; AIX64-NEXT: addi 4, 4, 1
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; AIX64-NEXT: stb 4, 0(3)
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; AIX64-NEXT: ld 3, 0(1)
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; AIX64-NEXT: ld 1, 0(1)
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; AIX64-NEXT: ld 31, -8(1)
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; AIX64-NEXT: blr
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;
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; LE-LABEL: frame_1:
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; LE: # %bb.0: # %entry
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; LE-NEXT: std 31, -8(1)
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; LE-NEXT: stdu 1, -48(1)
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; LE-NEXT: addi 3, 3, 15
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; LE-NEXT: mr 31, 1
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; LE-NEXT: addi 4, 31, 48
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; LE-NEXT: rldicr 3, 3, 0, 59
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; LE-NEXT: neg 3, 3
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; LE-NEXT: stdux 4, 1, 3
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; LE-NEXT: addi 3, 1, 32
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; LE-NEXT: lbz 4, 0(3)
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; LE-NEXT: addi 4, 4, 1
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; LE-NEXT: stb 4, 0(3)
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; LE-NEXT: ld 3, 0(1)
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; LE-NEXT: ld 1, 0(1)
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; LE-NEXT: ld 31, -8(1)
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; LE-NEXT: blr
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entry:
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%conv = sext i32 %num to i64
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%0 = alloca i8, i64 %conv, align 16
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%1 = load volatile i8, ptr %0, align 16
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%inc = add i8 %1, 1
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store volatile i8 %inc, ptr %0, align 16
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%2 = tail call ptr @llvm.frameaddress.p0(i32 1)
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ret ptr %2
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}
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define ptr @frame_0(i32 signext %num) nounwind {
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; AIX32-LABEL: frame_0:
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; AIX32: # %bb.0: # %entry
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; AIX32-NEXT: stw 31, -4(1)
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; AIX32-NEXT: stwu 1, -48(1)
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; AIX32-NEXT: addi 3, 3, 15
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; AIX32-NEXT: mr 31, 1
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; AIX32-NEXT: addi 4, 31, 48
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; AIX32-NEXT: rlwinm 3, 3, 0, 0, 27
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; AIX32-NEXT: neg 3, 3
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; AIX32-NEXT: stwux 4, 1, 3
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; AIX32-NEXT: addi 3, 1, 32
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; AIX32-NEXT: lbz 4, 0(3)
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; AIX32-NEXT: addi 4, 4, 1
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; AIX32-NEXT: stb 4, 0(3)
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; AIX32-NEXT: mr 3, 1
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; AIX32-NEXT: lwz 1, 0(1)
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; AIX32-NEXT: lwz 31, -4(1)
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; AIX32-NEXT: blr
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;
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; AIX64-LABEL: frame_0:
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; AIX64: # %bb.0: # %entry
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; AIX64-NEXT: std 31, -8(1)
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; AIX64-NEXT: stdu 1, -64(1)
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; AIX64-NEXT: addi 3, 3, 15
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; AIX64-NEXT: mr 31, 1
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; AIX64-NEXT: addi 4, 31, 64
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; AIX64-NEXT: rldicr 3, 3, 0, 59
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; AIX64-NEXT: neg 3, 3
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; AIX64-NEXT: stdux 4, 1, 3
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; AIX64-NEXT: addi 3, 1, 48
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; AIX64-NEXT: lbz 4, 0(3)
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; AIX64-NEXT: addi 4, 4, 1
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; AIX64-NEXT: stb 4, 0(3)
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; AIX64-NEXT: mr 3, 1
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; AIX64-NEXT: ld 1, 0(1)
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; AIX64-NEXT: ld 31, -8(1)
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; AIX64-NEXT: blr
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;
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; LE-LABEL: frame_0:
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; LE: # %bb.0: # %entry
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; LE-NEXT: std 31, -8(1)
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; LE-NEXT: stdu 1, -48(1)
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; LE-NEXT: addi 3, 3, 15
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; LE-NEXT: mr 31, 1
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; LE-NEXT: addi 4, 31, 48
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; LE-NEXT: rldicr 3, 3, 0, 59
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; LE-NEXT: neg 3, 3
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; LE-NEXT: stdux 4, 1, 3
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; LE-NEXT: addi 3, 1, 32
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; LE-NEXT: lbz 4, 0(3)
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; LE-NEXT: addi 4, 4, 1
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; LE-NEXT: stb 4, 0(3)
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; LE-NEXT: mr 3, 1
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; LE-NEXT: ld 1, 0(1)
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; LE-NEXT: ld 31, -8(1)
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; LE-NEXT: blr
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entry:
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%conv = sext i32 %num to i64
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%0 = alloca i8, i64 %conv, align 16
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%1 = load volatile i8, ptr %0, align 16
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%inc = add i8 %1, 1
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store volatile i8 %inc, ptr %0, align 16
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%2 = tail call ptr @llvm.frameaddress.p0(i32 0)
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ret ptr %2
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}
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