derek.holloway
7502bf64a4
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119 lines
4.2 KiB
LLVM
119 lines
4.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
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; RUN: -mcpu=pwr8 -code-model=large < %s | FileCheck %s
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%struct.STATICS1 = type <{ [128 x i8] }>
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@.STATICS1 = internal global %struct.STATICS1 <{ [128 x i8] c"\09\00\00\00\03\00\00\00\05\00\00\00\04\00\00\00\0A\00\00\00\0A\00\00\00\0B\00\00\00\0A\08\AF/\B8\B6\87\04 \A1\07\00\08\9D\00\00\09\00\00\00\05\00\00\00\03\00\00\00\03\00\00\00\05\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00" }>, align 16
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@.C302_MAIN_ = internal constant i32 4
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; Function Attrs: noinline norecurse nounwind
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define void @main() {
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; CHECK-LABEL: main:
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; CHECK: # %bb.0: # %L.entry
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; CHECK-NEXT: mflr 0
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; CHECK-NEXT: stdu 1, -32(1)
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; CHECK-NEXT: std 0, 48(1)
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset lr, 16
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; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
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; CHECK-NEXT: addis 5, 2, .LC1@toc@ha
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; CHECK-NEXT: ld 4, .LC0@toc@l(3)
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; CHECK-NEXT: ld 3, .LC1@toc@l(5)
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; CHECK-NEXT: addi 3, 3, 124
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; CHECK-NEXT: bl testFunc
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; CHECK-NEXT: nop
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; CHECK-NEXT: addi 1, 1, 32
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; CHECK-NEXT: ld 0, 16(1)
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; CHECK-NEXT: mtlr 0
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; CHECK-NEXT: blr
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L.entry:
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tail call void @testFunc(ptr getelementptr inbounds (%struct.STATICS1, ptr @.STATICS1, i64 0, i32 0, i64 124), ptr @.C302_MAIN_)
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ret void
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}
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; Function Attrs: noinline norecurse nounwind readonly
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define signext i32 @ifunc_(ptr nocapture readonly %i) {
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; CHECK-LABEL: ifunc_:
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; CHECK: # %bb.0: # %L.entry
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; CHECK-NEXT: lwa 3, 0(3)
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; CHECK-NEXT: blr
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L.entry:
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%0 = load i32, ptr %i, align 4
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ret i32 %0
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}
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; Function Attrs: noinline norecurse nounwind
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define void @testFunc(ptr nocapture %r, ptr nocapture readonly %k) {
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; CHECK-LABEL: testFunc:
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; CHECK: # %bb.0: # %L.entry
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; CHECK-NEXT: lwz 5, 0(4)
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; CHECK-NEXT: li 4, -3
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; CHECK-NEXT: cmpwi 5, 4
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; CHECK-NEXT: bge 0, .LBB2_6
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; CHECK-NEXT: # %bb.1: # %L.entry
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; CHECK-NEXT: cmplwi 5, 1
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; CHECK-NEXT: beq 0, .LBB2_11
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; CHECK-NEXT: # %bb.2: # %L.entry
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; CHECK-NEXT: cmplwi 5, 2
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; CHECK-NEXT: beq 0, .LBB2_5
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; CHECK-NEXT: # %bb.3: # %L.entry
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; CHECK-NEXT: cmplwi 5, 3
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; CHECK-NEXT: beq 0, .LBB2_11
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; CHECK-NEXT: # %bb.4: # %L.LB3_307
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; CHECK-NEXT: blr
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB2_5: # %infloop11
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; CHECK-NEXT: #
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; CHECK-NEXT: b .LBB2_5
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; CHECK-NEXT: .LBB2_6: # %L.entry
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; CHECK-NEXT: beq 0, .LBB2_10
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; CHECK-NEXT: # %bb.7: # %L.entry
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; CHECK-NEXT: cmplwi 5, 5
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; CHECK-NEXT: beq 0, .LBB2_11
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; CHECK-NEXT: # %bb.8: # %L.entry
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; CHECK-NEXT: cmplwi 5, 6
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; CHECK-NEXT: bnelr 0
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB2_9: # %infloop
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; CHECK-NEXT: #
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; CHECK-NEXT: b .LBB2_9
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; CHECK-NEXT: .LBB2_10: # %L.LB3_321.split
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; CHECK-NEXT: li 4, 5
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; CHECK-NEXT: .LBB2_11: # %L.LB3_307.sink.split
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; CHECK-NEXT: stw 4, 0(3)
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; CHECK-NEXT: blr
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L.entry:
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%0 = load i32, ptr %k, align 4
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switch i32 %0, label %L.LB3_307 [
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i32 1, label %L.LB3_307.sink.split
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i32 3, label %L.LB3_307.sink.split
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i32 4, label %L.LB3_321.split
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i32 5, label %L.LB3_307.sink.split
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i32 6, label %infloop.preheader
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i32 2, label %infloop11.preheader
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]
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infloop11.preheader: ; preds = %L.entry
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br label %infloop11
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infloop.preheader: ; preds = %L.entry
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br label %infloop
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L.LB3_321.split: ; preds = %L.entry
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br label %L.LB3_307.sink.split
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L.LB3_307.sink.split: ; preds = %L.LB3_321.split, %L.entry, %L.entry, %L.entry
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%.sink = phi i32 [ 5, %L.LB3_321.split ], [ -3, %L.entry ], [ -3, %L.entry ], [ -3, %L.entry ]
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store i32 %.sink, ptr %r, align 4
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br label %L.LB3_307
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L.LB3_307: ; preds = %L.LB3_307.sink.split, %L.entry
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ret void
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infloop: ; preds = %infloop.preheader, %infloop
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br label %infloop
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infloop11: ; preds = %infloop11.preheader, %infloop11
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br label %infloop11
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}
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