derek.holloway
7502bf64a4
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241 lines
11 KiB
YAML
241 lines
11 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=riscv64 -mattr=+a,+zacas,+zabha -run-pass=legalizer %s -o - \
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# RUN: | FileCheck %s --check-prefixes=RV32IA-ZABHA
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# RUN: llc -mtriple=riscv64 -mattr=+a -run-pass=legalizer %s -o - \
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# RUN: | FileCheck %s --check-prefixes=RV32IA
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---
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name: cmpxchg_i8
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body: |
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bb.0:
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liveins: $x10
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; RV32IA-ZABHA-LABEL: name: cmpxchg_i8
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; RV32IA-ZABHA: liveins: $x10
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; RV32IA-ZABHA-NEXT: {{ $}}
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; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
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; RV32IA-ZABHA-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; RV32IA-ZABHA-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; RV32IA-ZABHA-NEXT: [[ATOMIC_CMPXCHG:%[0-9]+]]:_(s64) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[C]], [[C1]] :: (load store monotonic (s8))
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; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMIC_CMPXCHG]](s64)
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; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
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;
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; RV32IA-LABEL: name: cmpxchg_i8
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; RV32IA: liveins: $x10
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; RV32IA-NEXT: {{ $}}
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; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
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; RV32IA-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; RV32IA-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; RV32IA-NEXT: [[ATOMIC_CMPXCHG:%[0-9]+]]:_(s64) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[C]], [[C1]] :: (load store monotonic (s8))
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; RV32IA-NEXT: $x10 = COPY [[ATOMIC_CMPXCHG]](s64)
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; RV32IA-NEXT: PseudoRET implicit $x10
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%0:_(p0) = COPY $x10
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%1:_(s8) = G_CONSTANT i8 0
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%2:_(s8) = G_CONSTANT i8 1
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%3:_(s8) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic (s8))
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%4:_(s64) = G_ANYEXT %3
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$x10 = COPY %4(s64)
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PseudoRET implicit $x10
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...
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---
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name: cmpxchg_i16
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body: |
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bb.0:
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liveins: $x10
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; RV32IA-ZABHA-LABEL: name: cmpxchg_i16
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; RV32IA-ZABHA: liveins: $x10
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; RV32IA-ZABHA-NEXT: {{ $}}
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; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
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; RV32IA-ZABHA-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; RV32IA-ZABHA-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; RV32IA-ZABHA-NEXT: [[ATOMIC_CMPXCHG:%[0-9]+]]:_(s64) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[C]], [[C1]] :: (load store monotonic (s16))
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; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMIC_CMPXCHG]](s64)
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; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
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;
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; RV32IA-LABEL: name: cmpxchg_i16
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; RV32IA: liveins: $x10
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; RV32IA-NEXT: {{ $}}
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; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
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; RV32IA-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; RV32IA-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; RV32IA-NEXT: [[ATOMIC_CMPXCHG:%[0-9]+]]:_(s64) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[C]], [[C1]] :: (load store monotonic (s16))
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; RV32IA-NEXT: $x10 = COPY [[ATOMIC_CMPXCHG]](s64)
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; RV32IA-NEXT: PseudoRET implicit $x10
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%0:_(p0) = COPY $x10
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%1:_(s16) = G_CONSTANT i16 0
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%2:_(s16) = G_CONSTANT i16 1
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%3:_(s16) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic (s16))
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%4:_(s64) = G_ANYEXT %3
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$x10 = COPY %4(s64)
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PseudoRET implicit $x10
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...
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---
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name: cmpxchg_i32
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body: |
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bb.0:
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liveins: $x10
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; RV32IA-ZABHA-LABEL: name: cmpxchg_i32
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; RV32IA-ZABHA: liveins: $x10
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; RV32IA-ZABHA-NEXT: {{ $}}
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; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
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; RV32IA-ZABHA-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; RV32IA-ZABHA-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; RV32IA-ZABHA-NEXT: [[ATOMIC_CMPXCHG:%[0-9]+]]:_(s64) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[C]], [[C1]] :: (load store monotonic (s32))
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; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMIC_CMPXCHG]](s64)
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; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
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;
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; RV32IA-LABEL: name: cmpxchg_i32
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; RV32IA: liveins: $x10
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; RV32IA-NEXT: {{ $}}
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; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
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; RV32IA-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; RV32IA-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; RV32IA-NEXT: [[ATOMIC_CMPXCHG:%[0-9]+]]:_(s64) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[C]], [[C1]] :: (load store monotonic (s32))
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; RV32IA-NEXT: $x10 = COPY [[ATOMIC_CMPXCHG]](s64)
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; RV32IA-NEXT: PseudoRET implicit $x10
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%0:_(p0) = COPY $x10
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%1:_(s32) = G_CONSTANT i32 0
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%2:_(s32) = G_CONSTANT i32 1
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%3:_(s32) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic (s32))
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%4:_(s64) = G_ANYEXT %3
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$x10 = COPY %4(s64)
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PseudoRET implicit $x10
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...
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---
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name: cmpxchg_i64
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body: |
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bb.0:
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liveins: $x10
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; RV32IA-ZABHA-LABEL: name: cmpxchg_i64
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; RV32IA-ZABHA: liveins: $x10
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; RV32IA-ZABHA-NEXT: {{ $}}
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; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
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; RV32IA-ZABHA-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; RV32IA-ZABHA-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; RV32IA-ZABHA-NEXT: [[ATOMIC_CMPXCHG:%[0-9]+]]:_(s64) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[C]], [[C1]] :: (load store monotonic (s64))
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; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMIC_CMPXCHG]](s64)
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; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
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;
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; RV32IA-LABEL: name: cmpxchg_i64
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; RV32IA: liveins: $x10
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; RV32IA-NEXT: {{ $}}
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; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
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; RV32IA-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; RV32IA-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; RV32IA-NEXT: [[ATOMIC_CMPXCHG:%[0-9]+]]:_(s64) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[C]], [[C1]] :: (load store monotonic (s64))
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; RV32IA-NEXT: $x10 = COPY [[ATOMIC_CMPXCHG]](s64)
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; RV32IA-NEXT: PseudoRET implicit $x10
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%0:_(p0) = COPY $x10
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%1:_(s64) = G_CONSTANT i64 0
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%2:_(s64) = G_CONSTANT i64 1
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%3:_(s64) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic (s64))
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$x10 = COPY %3(s64)
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PseudoRET implicit $x10
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...
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---
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name: cmpxchg_with_success_i32
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body: |
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bb.0:
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liveins: $x10
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; RV32IA-ZABHA-LABEL: name: cmpxchg_with_success_i32
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; RV32IA-ZABHA: liveins: $x10
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; RV32IA-ZABHA-NEXT: {{ $}}
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; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
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; RV32IA-ZABHA-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; RV32IA-ZABHA-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; RV32IA-ZABHA-NEXT: [[ATOMIC_CMPXCHG:%[0-9]+]]:_(s64) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[C]], [[C1]] :: (load store monotonic (s32))
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; RV32IA-ZABHA-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[ATOMIC_CMPXCHG]], 32
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; RV32IA-ZABHA-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[SEXT_INREG]](s64), [[C]]
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; RV32IA-ZABHA-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMIC_CMPXCHG]](s64)
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; RV32IA-ZABHA-NEXT: $x11 = COPY [[ICMP]](s64)
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; RV32IA-ZABHA-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; RV32IA-ZABHA-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x10
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; RV32IA-ZABHA-NEXT: $x10 = COPY [[COPY1]](s64)
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; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
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;
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; RV32IA-LABEL: name: cmpxchg_with_success_i32
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; RV32IA: liveins: $x10
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; RV32IA-NEXT: {{ $}}
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; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
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; RV32IA-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; RV32IA-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; RV32IA-NEXT: [[ATOMIC_CMPXCHG:%[0-9]+]]:_(s64) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[C]], [[C1]] :: (load store monotonic (s32))
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; RV32IA-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[ATOMIC_CMPXCHG]], 32
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; RV32IA-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[SEXT_INREG]](s64), [[C]]
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; RV32IA-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; RV32IA-NEXT: $x10 = COPY [[ATOMIC_CMPXCHG]](s64)
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; RV32IA-NEXT: $x11 = COPY [[ICMP]](s64)
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; RV32IA-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; RV32IA-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x10
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; RV32IA-NEXT: $x10 = COPY [[COPY1]](s64)
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; RV32IA-NEXT: PseudoRET implicit $x10
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%0:_(p0) = COPY $x10
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%1:_(s32) = G_CONSTANT i32 0
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%2:_(s32) = G_CONSTANT i32 1
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%3:_(s32), %4:_(s1) = G_ATOMIC_CMPXCHG_WITH_SUCCESS %0, %1, %2 :: (load store monotonic (s32))
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%5:_(s32) = G_ANYEXT %4
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%6:_(s32) = G_MUL %3, %5
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%7:_(s64) = G_ANYEXT %6
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$x10 = COPY %7(s64)
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PseudoRET implicit $x10
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...
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---
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name: cmpxchg_with_success_i64
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body: |
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bb.0:
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liveins: $x10
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; RV32IA-ZABHA-LABEL: name: cmpxchg_with_success_i64
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; RV32IA-ZABHA: liveins: $x10
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; RV32IA-ZABHA-NEXT: {{ $}}
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; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
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; RV32IA-ZABHA-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; RV32IA-ZABHA-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; RV32IA-ZABHA-NEXT: [[ATOMIC_CMPXCHG:%[0-9]+]]:_(s64) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[C]], [[C1]] :: (load store monotonic (s64))
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; RV32IA-ZABHA-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[ATOMIC_CMPXCHG]](s64), [[C]]
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; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[ATOMIC_CMPXCHG]](s64)
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; RV32IA-ZABHA-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; RV32IA-ZABHA-NEXT: $x10 = COPY [[COPY1]](s64)
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; RV32IA-ZABHA-NEXT: $x11 = COPY [[ICMP]](s64)
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; RV32IA-ZABHA-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; RV32IA-ZABHA-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; RV32IA-ZABHA-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
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; RV32IA-ZABHA-NEXT: $x10 = COPY [[COPY2]](s64)
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; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
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;
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; RV32IA-LABEL: name: cmpxchg_with_success_i64
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; RV32IA: liveins: $x10
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; RV32IA-NEXT: {{ $}}
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; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
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; RV32IA-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; RV32IA-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; RV32IA-NEXT: [[ATOMIC_CMPXCHG:%[0-9]+]]:_(s64) = G_ATOMIC_CMPXCHG [[COPY]](p0), [[C]], [[C1]] :: (load store monotonic (s64))
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; RV32IA-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[ATOMIC_CMPXCHG]](s64), [[C]]
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; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[ATOMIC_CMPXCHG]](s64)
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; RV32IA-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; RV32IA-NEXT: $x10 = COPY [[COPY1]](s64)
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; RV32IA-NEXT: $x11 = COPY [[ICMP]](s64)
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; RV32IA-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; RV32IA-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; RV32IA-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
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; RV32IA-NEXT: $x10 = COPY [[COPY2]](s64)
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; RV32IA-NEXT: PseudoRET implicit $x10
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%0:_(p0) = COPY $x10
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%1:_(s64) = G_CONSTANT i64 0
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%2:_(s64) = G_CONSTANT i64 1
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%3:_(s64), %4:_(s1) = G_ATOMIC_CMPXCHG_WITH_SUCCESS %0, %1, %2 :: (load store monotonic (s64))
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%5:_(s64) = G_ANYEXT %4
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%6:_(s64) = G_MUL %3, %5
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$x10 = COPY %6(s64)
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PseudoRET implicit $x10
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...
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